1*9a40c0fbSSheetal Tigadoli /* 2*9a40c0fbSSheetal Tigadoli * Copyright (c) 2019-2020, Broadcom 3*9a40c0fbSSheetal Tigadoli * 4*9a40c0fbSSheetal Tigadoli * SPDX-License-Identifier: BSD-3-Clause 5*9a40c0fbSSheetal Tigadoli */ 6*9a40c0fbSSheetal Tigadoli #include <stdint.h> 7*9a40c0fbSSheetal Tigadoli 8*9a40c0fbSSheetal Tigadoli #include <plat_brcm.h> 9*9a40c0fbSSheetal Tigadoli #include <platform_def.h> 10*9a40c0fbSSheetal Tigadoli 11*9a40c0fbSSheetal Tigadoli /* 12*9a40c0fbSSheetal Tigadoli * On Stingray, the system power level is the highest power level. 13*9a40c0fbSSheetal Tigadoli * The first entry in the power domain descriptor specifies the 14*9a40c0fbSSheetal Tigadoli * number of system power domains i.e. 1. 15*9a40c0fbSSheetal Tigadoli */ 16*9a40c0fbSSheetal Tigadoli #define SR_PWR_DOMAINS_AT_MAX_PWR_LVL 1 17*9a40c0fbSSheetal Tigadoli 18*9a40c0fbSSheetal Tigadoli /* 19*9a40c0fbSSheetal Tigadoli * The Stingray power domain tree descriptor. The cluster power domains 20*9a40c0fbSSheetal Tigadoli * are arranged so that when the PSCI generic code creates the power 21*9a40c0fbSSheetal Tigadoli * domain tree, the indices of the CPU power domain nodes it allocates 22*9a40c0fbSSheetal Tigadoli * match the linear indices returned by plat_core_pos_by_mpidr() 23*9a40c0fbSSheetal Tigadoli * i.e. CLUSTER0 CPUs are allocated indices from 0 to 1 and the higher 24*9a40c0fbSSheetal Tigadoli * indices for other Cluster CPUs. 25*9a40c0fbSSheetal Tigadoli */ 26*9a40c0fbSSheetal Tigadoli const unsigned char sr_power_domain_tree_desc[] = { 27*9a40c0fbSSheetal Tigadoli /* No of root nodes */ 28*9a40c0fbSSheetal Tigadoli SR_PWR_DOMAINS_AT_MAX_PWR_LVL, 29*9a40c0fbSSheetal Tigadoli /* No of children for the root node */ 30*9a40c0fbSSheetal Tigadoli BRCM_CLUSTER_COUNT, 31*9a40c0fbSSheetal Tigadoli /* No of children for the first cluster node */ 32*9a40c0fbSSheetal Tigadoli PLATFORM_CLUSTER0_CORE_COUNT, 33*9a40c0fbSSheetal Tigadoli /* No of children for the second cluster node */ 34*9a40c0fbSSheetal Tigadoli PLATFORM_CLUSTER1_CORE_COUNT, 35*9a40c0fbSSheetal Tigadoli /* No of children for the third cluster node */ 36*9a40c0fbSSheetal Tigadoli PLATFORM_CLUSTER2_CORE_COUNT, 37*9a40c0fbSSheetal Tigadoli /* No of children for the fourth cluster node */ 38*9a40c0fbSSheetal Tigadoli PLATFORM_CLUSTER3_CORE_COUNT, 39*9a40c0fbSSheetal Tigadoli }; 40*9a40c0fbSSheetal Tigadoli 41*9a40c0fbSSheetal Tigadoli /******************************************************************************* 42*9a40c0fbSSheetal Tigadoli * This function returns the Stingray topology tree information. 43*9a40c0fbSSheetal Tigadoli ******************************************************************************/ 44*9a40c0fbSSheetal Tigadoli const unsigned char *plat_get_power_domain_tree_desc(void) 45*9a40c0fbSSheetal Tigadoli { 46*9a40c0fbSSheetal Tigadoli return sr_power_domain_tree_desc; 47*9a40c0fbSSheetal Tigadoli } 48*9a40c0fbSSheetal Tigadoli 49*9a40c0fbSSheetal Tigadoli int plat_core_pos_by_mpidr(u_register_t mpidr) 50*9a40c0fbSSheetal Tigadoli { 51*9a40c0fbSSheetal Tigadoli return plat_brcm_calc_core_pos(mpidr); 52*9a40c0fbSSheetal Tigadoli } 53