1# 2# Copyright (c) 2019-2020, Broadcom 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Enable workaround for ERRATA_A72_859971 8ERRATA_A72_859971 := 1 9 10# Cache Coherency Interconnect Driver needed 11DRIVER_CC_ENABLE := 1 12$(eval $(call add_define,DRIVER_CC_ENABLE)) 13 14# BL31 is in DRAM 15ARM_BL31_IN_DRAM := 1 16 17USE_CRMU_SRAM := yes 18 19# Use single cluster 20ifeq (${USE_SINGLE_CLUSTER},yes) 21$(info Using Single Cluster) 22$(eval $(call add_define,USE_SINGLE_CLUSTER)) 23endif 24 25ifeq (${BOARD_CFG},) 26BOARD_CFG := bcm958742k 27endif 28 29# BL31 build for standalone mode 30ifeq (${STANDALONE_BL31},yes) 31RESET_TO_BL31 := 1 32$(info Using RESET_TO_BL31) 33endif 34 35# For testing purposes, use memsys stubs. Remove once memsys is fully tested. 36USE_MEMSYS_STUBS := yes 37 38# Default, use BL1_RW area 39ifneq (${BL2_USE_BL1_RW},no) 40$(eval $(call add_define,USE_BL1_RW)) 41endif 42 43# Default soft reset is L3 44$(eval $(call add_define,CONFIG_SOFT_RESET_L3)) 45 46include plat/brcm/board/common/board_common.mk 47 48SOC_DIR := brcm/board/stingray 49 50PLAT_INCLUDES += -Iplat/${SOC_DIR}/include/ \ 51 -Iinclude/plat/brcm/common/ \ 52 -Iplat/brcm/common/ 53 54PLAT_BL_COMMON_SOURCES += lib/cpus/aarch64/cortex_a72.S \ 55 plat/${SOC_DIR}/aarch64/plat_helpers.S \ 56 drivers/ti/uart/aarch64/16550_console.S \ 57 plat/${SOC_DIR}/src/tz_sec.c \ 58 drivers/arm/tzc/tzc400.c \ 59 plat/${SOC_DIR}/src/topology.c 60 61 62# Include GICv3 driver files 63include drivers/arm/gic/v3/gicv3.mk 64 65BRCM_GIC_SOURCES := ${GICV3_SOURCES} \ 66 plat/common/plat_gicv3.c \ 67 plat/brcm/common/brcm_gicv3.c 68 69BL31_SOURCES += \ 70 drivers/arm/ccn/ccn.c \ 71 plat/brcm/board/common/timer_sync.c \ 72 plat/brcm/common/brcm_ccn.c \ 73 plat/common/plat_psci_common.c \ 74 plat/${SOC_DIR}/driver/ihost_pll_config.c \ 75 ${BRCM_GIC_SOURCES} 76 77ifdef SCP_BL2 78PLAT_INCLUDES += -Iplat/brcm/common/ 79 80BL31_SOURCES += plat/brcm/common/brcm_mhu.c \ 81 plat/brcm/common/brcm_scpi.c \ 82 plat/${SOC_DIR}/src/brcm_pm_ops.c 83else 84BL31_SOURCES += plat/${SOC_DIR}/src/ihost_pm.c \ 85 plat/${SOC_DIR}/src/pm.c 86endif 87 88# Do not execute the startup code on warm reset. 89PROGRAMMABLE_RESET_ADDRESS := 1 90