1717448d6SSheetal Tigadoli# 2717448d6SSheetal Tigadoli# Copyright (c) 2019-2020, Broadcom 3717448d6SSheetal Tigadoli# 4717448d6SSheetal Tigadoli# SPDX-License-Identifier: BSD-3-Clause 5717448d6SSheetal Tigadoli# 6717448d6SSheetal Tigadoli 7717448d6SSheetal Tigadoli# Enable workaround for ERRATA_A72_859971 8717448d6SSheetal TigadoliERRATA_A72_859971 := 1 9717448d6SSheetal Tigadoli 10717448d6SSheetal Tigadoli# Cache Coherency Interconnect Driver needed 11717448d6SSheetal TigadoliDRIVER_CC_ENABLE := 1 12717448d6SSheetal Tigadoli$(eval $(call add_define,DRIVER_CC_ENABLE)) 13717448d6SSheetal Tigadoli 14*9a40c0fbSSheetal Tigadoli# BL31 is in DRAM 15*9a40c0fbSSheetal TigadoliARM_BL31_IN_DRAM := 1 16*9a40c0fbSSheetal Tigadoli 17717448d6SSheetal TigadoliUSE_CRMU_SRAM := yes 18717448d6SSheetal Tigadoli 19717448d6SSheetal Tigadoli# Use single cluster 20717448d6SSheetal Tigadoliifeq (${USE_SINGLE_CLUSTER},yes) 21717448d6SSheetal Tigadoli$(info Using Single Cluster) 22717448d6SSheetal Tigadoli$(eval $(call add_define,USE_SINGLE_CLUSTER)) 23717448d6SSheetal Tigadoliendif 24717448d6SSheetal Tigadoli 25717448d6SSheetal Tigadoliifeq (${BOARD_CFG},) 26717448d6SSheetal TigadoliBOARD_CFG := bcm958742k 27717448d6SSheetal Tigadoliendif 28717448d6SSheetal Tigadoli 29*9a40c0fbSSheetal Tigadoli# BL31 build for standalone mode 30*9a40c0fbSSheetal Tigadoliifeq (${STANDALONE_BL31},yes) 31*9a40c0fbSSheetal TigadoliRESET_TO_BL31 := 1 32*9a40c0fbSSheetal Tigadoli$(info Using RESET_TO_BL31) 33*9a40c0fbSSheetal Tigadoliendif 34*9a40c0fbSSheetal Tigadoli 35717448d6SSheetal Tigadoli# For testing purposes, use memsys stubs. Remove once memsys is fully tested. 36717448d6SSheetal TigadoliUSE_MEMSYS_STUBS := yes 37717448d6SSheetal Tigadoli 38717448d6SSheetal Tigadoli# Default, use BL1_RW area 39717448d6SSheetal Tigadoliifneq (${BL2_USE_BL1_RW},no) 40717448d6SSheetal Tigadoli$(eval $(call add_define,USE_BL1_RW)) 41717448d6SSheetal Tigadoliendif 42717448d6SSheetal Tigadoli 43717448d6SSheetal Tigadoli# Default soft reset is L3 44717448d6SSheetal Tigadoli$(eval $(call add_define,CONFIG_SOFT_RESET_L3)) 45717448d6SSheetal Tigadoli 46717448d6SSheetal Tigadoliinclude plat/brcm/board/common/board_common.mk 47717448d6SSheetal Tigadoli 48717448d6SSheetal TigadoliSOC_DIR := brcm/board/stingray 49717448d6SSheetal Tigadoli 50717448d6SSheetal TigadoliPLAT_INCLUDES += -Iplat/${SOC_DIR}/include/ \ 51717448d6SSheetal Tigadoli -Iinclude/plat/brcm/common/ \ 52717448d6SSheetal Tigadoli -Iplat/brcm/common/ 53717448d6SSheetal Tigadoli 54717448d6SSheetal TigadoliPLAT_BL_COMMON_SOURCES += lib/cpus/aarch64/cortex_a72.S \ 55717448d6SSheetal Tigadoli plat/${SOC_DIR}/aarch64/plat_helpers.S \ 56717448d6SSheetal Tigadoli drivers/ti/uart/aarch64/16550_console.S \ 57*9a40c0fbSSheetal Tigadoli plat/${SOC_DIR}/src/tz_sec.c \ 58*9a40c0fbSSheetal Tigadoli drivers/arm/tzc/tzc400.c \ 59*9a40c0fbSSheetal Tigadoli plat/${SOC_DIR}/src/topology.c 60*9a40c0fbSSheetal Tigadoli 61*9a40c0fbSSheetal Tigadoli 62*9a40c0fbSSheetal Tigadoli# Include GICv3 driver files 63*9a40c0fbSSheetal Tigadoliinclude drivers/arm/gic/v3/gicv3.mk 64*9a40c0fbSSheetal Tigadoli 65*9a40c0fbSSheetal TigadoliBRCM_GIC_SOURCES := ${GICV3_SOURCES} \ 66*9a40c0fbSSheetal Tigadoli plat/common/plat_gicv3.c \ 67*9a40c0fbSSheetal Tigadoli plat/brcm/common/brcm_gicv3.c 68*9a40c0fbSSheetal Tigadoli 69*9a40c0fbSSheetal TigadoliBL31_SOURCES += \ 70*9a40c0fbSSheetal Tigadoli drivers/arm/ccn/ccn.c \ 71*9a40c0fbSSheetal Tigadoli plat/brcm/board/common/timer_sync.c \ 72*9a40c0fbSSheetal Tigadoli plat/brcm/common/brcm_ccn.c \ 73*9a40c0fbSSheetal Tigadoli plat/common/plat_psci_common.c \ 74*9a40c0fbSSheetal Tigadoli plat/${SOC_DIR}/driver/ihost_pll_config.c \ 75*9a40c0fbSSheetal Tigadoli ${BRCM_GIC_SOURCES} 76*9a40c0fbSSheetal Tigadoli 77*9a40c0fbSSheetal Tigadoliifdef SCP_BL2 78*9a40c0fbSSheetal TigadoliPLAT_INCLUDES += -Iplat/brcm/common/ 79*9a40c0fbSSheetal Tigadoli 80*9a40c0fbSSheetal TigadoliBL31_SOURCES += plat/brcm/common/brcm_mhu.c \ 81*9a40c0fbSSheetal Tigadoli plat/brcm/common/brcm_scpi.c \ 82*9a40c0fbSSheetal Tigadoli plat/${SOC_DIR}/src/brcm_pm_ops.c 83*9a40c0fbSSheetal Tigadolielse 84*9a40c0fbSSheetal TigadoliBL31_SOURCES += plat/${SOC_DIR}/src/ihost_pm.c \ 85*9a40c0fbSSheetal Tigadoli plat/${SOC_DIR}/src/pm.c 86*9a40c0fbSSheetal Tigadoliendif 87*9a40c0fbSSheetal Tigadoli 88*9a40c0fbSSheetal Tigadoli# Do not execute the startup code on warm reset. 89*9a40c0fbSSheetal TigadoliPROGRAMMABLE_RESET_ADDRESS := 1 90