xref: /rk3399_ARM-atf/plat/brcm/board/common/timer_sync.c (revision 9a40c0fba66ccc706ed90ce9b40de6b0045bd660)
1*9a40c0fbSSheetal Tigadoli /*
2*9a40c0fbSSheetal Tigadoli  * Copyright (c) 2015 - 2020, Broadcom
3*9a40c0fbSSheetal Tigadoli  *
4*9a40c0fbSSheetal Tigadoli  * SPDX-License-Identifier: BSD-3-Clause
5*9a40c0fbSSheetal Tigadoli  */
6*9a40c0fbSSheetal Tigadoli 
7*9a40c0fbSSheetal Tigadoli #include <arch_helpers.h>
8*9a40c0fbSSheetal Tigadoli #include <common/debug.h>
9*9a40c0fbSSheetal Tigadoli #include <lib/mmio.h>
10*9a40c0fbSSheetal Tigadoli 
11*9a40c0fbSSheetal Tigadoli #include <platform_def.h>
12*9a40c0fbSSheetal Tigadoli #include <timer_sync.h>
13*9a40c0fbSSheetal Tigadoli 
14*9a40c0fbSSheetal Tigadoli /*******************************************************************************
15*9a40c0fbSSheetal Tigadoli  * Defines related to time sync and satelite timers
16*9a40c0fbSSheetal Tigadoli  ******************************************************************************/
17*9a40c0fbSSheetal Tigadoli #define TIME_SYNC_WR_ENA	((uint32_t)0xACCE55 << 8)
18*9a40c0fbSSheetal Tigadoli #define IHOST_STA_TMR_CTRL	0x1800
19*9a40c0fbSSheetal Tigadoli #define IHOST_SAT_TMR_INC_L	0x1814
20*9a40c0fbSSheetal Tigadoli #define IHOST_SAT_TMR_INC_H	0x1818
21*9a40c0fbSSheetal Tigadoli 
22*9a40c0fbSSheetal Tigadoli #define SAT_TMR_CYCLE_DELAY	2
23*9a40c0fbSSheetal Tigadoli #define SAT_TMR_32BIT_WRAP_VAL	(BIT_64(32) - SAT_TMR_CYCLE_DELAY)
24*9a40c0fbSSheetal Tigadoli 
25*9a40c0fbSSheetal Tigadoli void ihost_enable_satellite_timer(unsigned int cluster_id)
26*9a40c0fbSSheetal Tigadoli {
27*9a40c0fbSSheetal Tigadoli 	uintptr_t ihost_base;
28*9a40c0fbSSheetal Tigadoli 	uint32_t time_lx, time_h;
29*9a40c0fbSSheetal Tigadoli 	uintptr_t ihost_enable;
30*9a40c0fbSSheetal Tigadoli 
31*9a40c0fbSSheetal Tigadoli 	VERBOSE("Program iHost%u satellite timer\n", cluster_id);
32*9a40c0fbSSheetal Tigadoli 	ihost_base = IHOST0_BASE + cluster_id * IHOST_ADDR_SPACE;
33*9a40c0fbSSheetal Tigadoli 
34*9a40c0fbSSheetal Tigadoli 	/* this read starts the satellite timer counting from 0 */
35*9a40c0fbSSheetal Tigadoli 	ihost_enable = CENTRAL_TIMER_GET_IHOST_ENA_BASE + cluster_id * 4;
36*9a40c0fbSSheetal Tigadoli 	time_lx = mmio_read_32(ihost_enable);
37*9a40c0fbSSheetal Tigadoli 
38*9a40c0fbSSheetal Tigadoli 	/*
39*9a40c0fbSSheetal Tigadoli 	 * Increment the satellite timer by the central timer plus 2
40*9a40c0fbSSheetal Tigadoli 	 * to accommodate for a 1 cycle delay through NOC
41*9a40c0fbSSheetal Tigadoli 	 * plus counter starting from 0.
42*9a40c0fbSSheetal Tigadoli 	 */
43*9a40c0fbSSheetal Tigadoli 	mmio_write_32(ihost_base + IHOST_SAT_TMR_INC_L,
44*9a40c0fbSSheetal Tigadoli 		      time_lx + SAT_TMR_CYCLE_DELAY);
45*9a40c0fbSSheetal Tigadoli 
46*9a40c0fbSSheetal Tigadoli 	/*
47*9a40c0fbSSheetal Tigadoli 	 * Read the latched upper data, if lx will wrap by adding 2 to it
48*9a40c0fbSSheetal Tigadoli 	 * we need to handle the wrap
49*9a40c0fbSSheetal Tigadoli 	 */
50*9a40c0fbSSheetal Tigadoli 	time_h = mmio_read_32(CENTRAL_TIMER_GET_H);
51*9a40c0fbSSheetal Tigadoli 	if (time_lx >= SAT_TMR_32BIT_WRAP_VAL)
52*9a40c0fbSSheetal Tigadoli 		mmio_write_32(ihost_base + IHOST_SAT_TMR_INC_H, time_h + 1);
53*9a40c0fbSSheetal Tigadoli 	else
54*9a40c0fbSSheetal Tigadoli 		mmio_write_32(ihost_base + IHOST_SAT_TMR_INC_H, time_h);
55*9a40c0fbSSheetal Tigadoli }
56*9a40c0fbSSheetal Tigadoli 
57*9a40c0fbSSheetal Tigadoli void brcm_timer_sync_init(void)
58*9a40c0fbSSheetal Tigadoli {
59*9a40c0fbSSheetal Tigadoli 	unsigned int cluster_id;
60*9a40c0fbSSheetal Tigadoli 
61*9a40c0fbSSheetal Tigadoli 	/* Get the Time Sync module out of reset */
62*9a40c0fbSSheetal Tigadoli 	mmio_setbits_32(CDRU_MISC_RESET_CONTROL,
63*9a40c0fbSSheetal Tigadoli 			BIT(CDRU_MISC_RESET_CONTROL_TS_RESET_N));
64*9a40c0fbSSheetal Tigadoli 
65*9a40c0fbSSheetal Tigadoli 	/* Deassert the Central Timer TIMER_EN signal for all module */
66*9a40c0fbSSheetal Tigadoli 	mmio_write_32(CENTRAL_TIMER_SAT_TMR_ENA, TIME_SYNC_WR_ENA);
67*9a40c0fbSSheetal Tigadoli 
68*9a40c0fbSSheetal Tigadoli 	/* enables/programs iHost0 satellite timer*/
69*9a40c0fbSSheetal Tigadoli 	cluster_id = MPIDR_AFFLVL1_VAL(read_mpidr());
70*9a40c0fbSSheetal Tigadoli 	ihost_enable_satellite_timer(cluster_id);
71*9a40c0fbSSheetal Tigadoli }
72