xref: /rk3399_ARM-atf/plat/brcm/board/common/board_common.mk (revision bffde63de7a2c1a8534c1d969857d17fa17e30df)
1#
2# Copyright (c) 2015 - 2020, Broadcom
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7PLAT_BL_COMMON_SOURCES	+=	plat/brcm/board/common/board_common.c
8
9# If no board config makefile, do not include it
10ifneq (${BOARD_CFG},)
11BOARD_CFG_MAKE := $(shell find plat/brcm/board/${PLAT} -name '${BOARD_CFG}.mk')
12$(eval $(call add_define,BOARD_CFG))
13ifneq (${BOARD_CFG_MAKE},)
14$(info Including ${BOARD_CFG_MAKE})
15include ${BOARD_CFG_MAKE}
16else
17$(error Error: File ${BOARD_CFG}.mk not found in plat/brcm/board/${PLAT})
18endif
19endif
20
21# To compile with highest log level (VERBOSE) set value to 50
22LOG_LEVEL := 40
23
24# Use custom generic timer clock
25ifneq (${GENTIMER_ACTUAL_CLOCK},)
26$(info Using GENTIMER_ACTUAL_CLOCK=$(GENTIMER_ACTUAL_CLOCK))
27SYSCNT_FREQ := $(GENTIMER_ACTUAL_CLOCK)
28$(eval $(call add_define,SYSCNT_FREQ))
29endif
30
31ifeq (${DRIVER_EMMC_ENABLE},)
32DRIVER_EMMC_ENABLE :=1
33endif
34
35# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set
36ifeq (${BRCM_DISABLE_TRUSTED_WDOG},)
37BRCM_DISABLE_TRUSTED_WDOG	:=	0
38endif
39ifeq (${SPIN_ON_BL1_EXIT}, 1)
40BRCM_DISABLE_TRUSTED_WDOG	:=	1
41endif
42
43$(eval $(call assert_boolean,BRCM_DISABLE_TRUSTED_WDOG))
44$(eval $(call add_define,BRCM_DISABLE_TRUSTED_WDOG))
45
46# Process ARM_BL31_IN_DRAM flag
47ifeq (${ARM_BL31_IN_DRAM},)
48ARM_BL31_IN_DRAM		:=	0
49endif
50$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
51$(eval $(call add_define,ARM_BL31_IN_DRAM))
52
53ifeq (${STANDALONE_BL2},yes)
54BL2_LOG_LEVEL := 40
55$(eval $(call add_define,MMU_DISABLED))
56endif
57
58# BL2 XIP from QSPI
59RUN_BL2_FROM_QSPI := 0
60ifeq (${RUN_BL2_FROM_QSPI},1)
61$(eval $(call add_define,RUN_BL2_FROM_QSPI))
62endif
63
64# BL2 XIP from NAND
65RUN_BL2_FROM_NAND := 0
66ifeq (${RUN_BL2_FROM_NAND},1)
67$(eval $(call add_define,RUN_BL2_FROM_NAND))
68endif
69
70ifneq (${ELOG_AP_UART_LOG_BASE},)
71$(eval $(call add_define,ELOG_AP_UART_LOG_BASE))
72endif
73
74ifeq (${ELOG_SUPPORT},1)
75ifeq (${ELOG_STORE_MEDIA},DDR)
76$(eval $(call add_define,ELOG_STORE_MEDIA_DDR))
77ifneq (${ELOG_STORE_OFFSET},)
78$(eval $(call add_define,ELOG_STORE_OFFSET))
79endif
80endif
81endif
82
83ifneq (${BL2_LOG_LEVEL},)
84$(eval $(call add_define,BL2_LOG_LEVEL))
85endif
86
87ifneq (${BL31_LOG_LEVEL},)
88$(eval $(call add_define,BL31_LOG_LEVEL))
89endif
90
91# Use CRMU SRAM from iHOST
92ifneq (${USE_CRMU_SRAM},)
93$(eval $(call add_define,USE_CRMU_SRAM))
94endif
95
96# Use PIO mode if DDR is not used
97ifeq (${USE_DDR},yes)
98EMMC_USE_DMA	:=	1
99else
100EMMC_USE_DMA	:=	0
101endif
102$(eval $(call add_define,EMMC_USE_DMA))
103
104# On BRCM platforms, separate the code and read-only data sections to allow
105# mapping the former as executable and the latter as execute-never.
106SEPARATE_CODE_AND_RODATA	:=	1
107
108# Use generic OID definition (tbbr_oid.h)
109USE_TBBR_DEFS			:=	1
110
111PLAT_INCLUDES		+=	-Iplat/brcm/board/common \
112				-Iinclude/drivers/brcm \
113				-Iinclude/drivers/brcm/emmc
114
115PLAT_BL_COMMON_SOURCES	+=	plat/brcm/common/brcm_common.c \
116				plat/brcm/board/common/cmn_sec.c \
117				plat/brcm/board/common/bcm_console.c \
118				plat/brcm/board/common/brcm_mbedtls.c \
119				plat/brcm/board/common/plat_setup.c \
120				plat/brcm/board/common/platform_common.c \
121				drivers/arm/sp804/sp804_delay_timer.c \
122				drivers/brcm/sotp.c \
123				drivers/delay_timer/delay_timer.c \
124				drivers/io/io_fip.c \
125				drivers/io/io_memmap.c \
126				drivers/io/io_storage.c \
127				plat/brcm/common/brcm_io_storage.c \
128				plat/brcm/board/common/err.c \
129				plat/brcm/board/common/sbl_util.c \
130				drivers/arm/sp805/sp805.c
131
132# Add eMMC driver
133ifeq (${DRIVER_EMMC_ENABLE},1)
134$(eval $(call add_define,DRIVER_EMMC_ENABLE))
135
136EMMC_SOURCES		+=	drivers/brcm/emmc/emmc_chal_sd.c \
137				drivers/brcm/emmc/emmc_csl_sdcard.c \
138				drivers/brcm/emmc/emmc_csl_sdcmd.c \
139				drivers/brcm/emmc/emmc_pboot_hal_memory_drv.c
140
141PLAT_BL_COMMON_SOURCES += ${EMMC_SOURCES}
142
143ifeq (${DRIVER_EMMC_ENABLE_DATA_WIDTH_8BIT},)
144$(eval $(call add_define,DRIVER_EMMC_ENABLE_DATA_WIDTH_8BIT))
145endif
146endif
147
148BL2_SOURCES		+=	plat/brcm/common/brcm_bl2_mem_params_desc.c \
149				plat/brcm/common/brcm_image_load.c \
150				common/desc_image_load.c
151
152BL2_SOURCES		+= 	plat/brcm/common/brcm_bl2_setup.c
153
154BL31_SOURCES		+=	plat/brcm/common/brcm_bl31_setup.c
155
156ifeq (${BCM_ELOG},yes)
157ELOG_SOURCES		+= 	plat/brcm/board/common/bcm_elog.c
158BL2_SOURCES		+= 	${ELOG_SOURCES}
159BL31_SOURCES		+= 	${ELOG_SOURCES}
160endif
161
162ifeq (${DRIVER_OCOTP_ENABLE},1)
163$(eval $(call add_define,DRIVER_OCOTP_ENABLE))
164BL2_SOURCES		+= drivers/brcm/ocotp.c
165endif
166
167# Enable FRU table support
168ifeq (${USE_FRU},yes)
169$(eval $(call add_define,USE_FRU))
170BL2_SOURCES		+= drivers/brcm/fru.c
171endif
172
173# Enable GPIO support
174ifeq (${USE_GPIO},yes)
175$(eval $(call add_define,USE_GPIO))
176BL2_SOURCES             += drivers/gpio/gpio.c
177BL2_SOURCES             += drivers/brcm/iproc_gpio.c
178ifeq (${GPIO_SUPPORT_FLOAT_DETECTION},yes)
179$(eval $(call add_define,GPIO_SUPPORT_FLOAT_DETECTION))
180endif
181endif
182
183# Include mbedtls if it can be located
184MBEDTLS_DIR := mbedtls
185MBEDTLS_CHECK := $(shell find ${MBEDTLS_DIR}/include -name '${MBEDTLS_DIR}')
186
187ifneq (${MBEDTLS_CHECK},)
188$(info Found mbedTLS at ${MBEDTLS_DIR})
189PLAT_INCLUDES += -I${MBEDTLS_DIR}/include/mbedtls
190# Specify mbedTLS configuration file
191MBEDTLS_CONFIG_FILE	:=	"<brcm_mbedtls_config.h>"
192
193# By default, use RSA keys
194KEY_ALG := rsa_1_5
195
196# Include common TBB sources
197AUTH_SOURCES	+= 	drivers/auth/auth_mod.c \
198			drivers/auth/crypto_mod.c \
199			drivers/auth/img_parser_mod.c \
200			drivers/auth/tbbr/tbbr_cot.c
201
202BL2_SOURCES	+=	${AUTH_SOURCES}
203
204# Use ATF framework for MBEDTLS
205TRUSTED_BOARD_BOOT := 1
206CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
207IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
208$(info Including ${CRYPTO_LIB_MK})
209include ${CRYPTO_LIB_MK}
210$(info Including ${IMG_PARSER_LIB_MK})
211include ${IMG_PARSER_LIB_MK}
212
213# Use ATF secure boot functions
214# Use Hardcoded hash for devel
215
216ARM_ROTPK_LOCATION=arm_rsa
217ifeq (${ARM_ROTPK_LOCATION}, arm_rsa)
218ARM_ROTPK_LOCATION_ID=ARM_ROTPK_DEVEL_RSA_ID
219ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
220else ifeq (${ARM_ROTPK_LOCATION}, brcm_rsa)
221ARM_ROTPK_LOCATION_ID=BRCM_ROTPK_SOTP_RSA_ID
222ifeq (${ROT_KEY},)
223ROT_KEY=plat/brcm/board/common/rotpk/rsa_dauth2048_key.pem
224endif
225KEY_FIND := $(shell m="${ROT_KEY}"; [ -f "$$m" ] && echo "$$m")
226ifeq (${KEY_FIND},)
227$(error Error: No ${ROT_KEY} located)
228else
229$(info Using ROT_KEY: ${ROT_KEY})
230endif
231else
232$(error "Unsupported ARM_ROTPK_LOCATION value")
233endif
234
235$(eval $(call add_define,ARM_ROTPK_LOCATION_ID))
236PLAT_BL_COMMON_SOURCES+=plat/brcm/board/common/board_arm_trusted_boot.c
237endif
238
239#M0 runtime firmware
240ifdef SCP_BL2
241$(eval $(call add_define,NEED_SCP_BL2))
242SCP_CFG_DIR=$(dir ${SCP_BL2})
243PLAT_INCLUDES += -I${SCP_CFG_DIR}
244endif
245
246ifneq (${NEED_BL33},yes)
247# If there is no BL33, BL31 will jump to this address.
248ifeq (${USE_DDR},yes)
249PRELOADED_BL33_BASE := 0x80000000
250else
251PRELOADED_BL33_BASE := 0x74000000
252endif
253endif
254
255# Use translation tables library v1 by default
256ARM_XLAT_TABLES_LIB_V1		:=	1
257ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
258$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
259$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
260PLAT_BL_COMMON_SOURCES	+=	lib/xlat_tables/aarch64/xlat_tables.c \
261				lib/xlat_tables/xlat_tables_common.c
262endif
263