xref: /rk3399_ARM-atf/plat/brcm/board/common/board_common.mk (revision b67e9880fcc768b1ddc60cdb3cd8f71c8dc15b7a)
1#
2# Copyright (c) 2015 - 2021, Broadcom
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7PLAT_BL_COMMON_SOURCES	+=	plat/brcm/board/common/board_common.c
8
9# If no board config makefile, do not include it
10ifneq (${BOARD_CFG},)
11BOARD_CFG_MAKE := $(shell find plat/brcm/board/${PLAT} -name '${BOARD_CFG}.mk')
12$(eval $(call add_define,BOARD_CFG))
13ifneq (${BOARD_CFG_MAKE},)
14$(info Including ${BOARD_CFG_MAKE})
15include ${BOARD_CFG_MAKE}
16else
17$(error Error: File ${BOARD_CFG}.mk not found in plat/brcm/board/${PLAT})
18endif
19endif
20
21# To compile with highest log level (VERBOSE) set value to 50
22LOG_LEVEL := 40
23
24# Use custom generic timer clock
25ifneq (${GENTIMER_ACTUAL_CLOCK},)
26$(info Using GENTIMER_ACTUAL_CLOCK=$(GENTIMER_ACTUAL_CLOCK))
27SYSCNT_FREQ := $(GENTIMER_ACTUAL_CLOCK)
28$(eval $(call add_define,SYSCNT_FREQ))
29endif
30
31ifeq (${DRIVER_EMMC_ENABLE},)
32DRIVER_EMMC_ENABLE :=1
33endif
34
35ifeq (${DRIVER_SPI_ENABLE},)
36DRIVER_SPI_ENABLE := 0
37endif
38
39ifeq (${DRIVER_I2C_ENABLE},)
40DRIVER_I2C_ENABLE := 0
41endif
42
43# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set
44ifeq (${BRCM_DISABLE_TRUSTED_WDOG},)
45BRCM_DISABLE_TRUSTED_WDOG	:=	0
46endif
47ifeq (${SPIN_ON_BL1_EXIT}, 1)
48BRCM_DISABLE_TRUSTED_WDOG	:=	1
49endif
50
51$(eval $(call assert_boolean,BRCM_DISABLE_TRUSTED_WDOG))
52$(eval $(call add_define,BRCM_DISABLE_TRUSTED_WDOG))
53
54# Process ARM_BL31_IN_DRAM flag
55ifeq (${ARM_BL31_IN_DRAM},)
56ARM_BL31_IN_DRAM		:=	0
57endif
58$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
59$(eval $(call add_define,ARM_BL31_IN_DRAM))
60
61ifeq (${STANDALONE_BL2},yes)
62BL2_LOG_LEVEL := 40
63$(eval $(call add_define,MMU_DISABLED))
64endif
65
66# BL2 XIP from QSPI
67RUN_BL2_FROM_QSPI := 0
68ifeq (${RUN_BL2_FROM_QSPI},1)
69$(eval $(call add_define,RUN_BL2_FROM_QSPI))
70endif
71
72# BL2 XIP from NAND
73RUN_BL2_FROM_NAND := 0
74ifeq (${RUN_BL2_FROM_NAND},1)
75$(eval $(call add_define,RUN_BL2_FROM_NAND))
76endif
77
78ifneq (${ELOG_AP_UART_LOG_BASE},)
79$(eval $(call add_define,ELOG_AP_UART_LOG_BASE))
80endif
81
82ifeq (${ELOG_SUPPORT},1)
83ifeq (${ELOG_STORE_MEDIA},DDR)
84$(eval $(call add_define,ELOG_STORE_MEDIA_DDR))
85ifneq (${ELOG_STORE_OFFSET},)
86$(eval $(call add_define,ELOG_STORE_OFFSET))
87endif
88endif
89endif
90
91ifneq (${BL2_LOG_LEVEL},)
92$(eval $(call add_define,BL2_LOG_LEVEL))
93endif
94
95ifneq (${BL31_LOG_LEVEL},)
96$(eval $(call add_define,BL31_LOG_LEVEL))
97endif
98
99# Use CRMU SRAM from iHOST
100ifneq (${USE_CRMU_SRAM},)
101$(eval $(call add_define,USE_CRMU_SRAM))
102endif
103
104# Use PIO mode if DDR is not used
105ifeq (${USE_DDR},yes)
106EMMC_USE_DMA	:=	1
107else
108EMMC_USE_DMA	:=	0
109endif
110$(eval $(call add_define,EMMC_USE_DMA))
111
112# On BRCM platforms, separate the code and read-only data sections to allow
113# mapping the former as executable and the latter as execute-never.
114SEPARATE_CODE_AND_RODATA	:=	1
115
116# Use generic OID definition (tbbr_oid.h)
117USE_TBBR_DEFS			:=	1
118
119PLAT_INCLUDES		+=	-Iplat/brcm/board/common \
120				-Iinclude/drivers/brcm \
121				-Iinclude/drivers/brcm/emmc
122
123PLAT_BL_COMMON_SOURCES	+=	plat/brcm/common/brcm_common.c \
124				plat/brcm/board/common/cmn_sec.c \
125				plat/brcm/board/common/bcm_console.c \
126				plat/brcm/board/common/brcm_mbedtls.c \
127				plat/brcm/board/common/plat_setup.c \
128				plat/brcm/board/common/platform_common.c \
129				drivers/arm/sp804/sp804_delay_timer.c \
130				drivers/brcm/sotp.c \
131				drivers/delay_timer/delay_timer.c \
132				drivers/io/io_fip.c \
133				drivers/io/io_memmap.c \
134				drivers/io/io_storage.c \
135				plat/brcm/common/brcm_io_storage.c \
136				plat/brcm/board/common/err.c \
137				plat/brcm/board/common/sbl_util.c \
138				drivers/arm/sp805/sp805.c
139
140# Add RNG driver
141DRIVER_RNG_ENABLE := 1
142ifeq (${DRIVER_RNG_ENABLE},1)
143PLAT_BL_COMMON_SOURCES	+=	drivers/brcm/rng.c
144endif
145
146# Add eMMC driver
147ifeq (${DRIVER_EMMC_ENABLE},1)
148$(eval $(call add_define,DRIVER_EMMC_ENABLE))
149
150EMMC_SOURCES		+=	drivers/brcm/emmc/emmc_chal_sd.c \
151				drivers/brcm/emmc/emmc_csl_sdcard.c \
152				drivers/brcm/emmc/emmc_csl_sdcmd.c \
153				drivers/brcm/emmc/emmc_pboot_hal_memory_drv.c
154
155PLAT_BL_COMMON_SOURCES += ${EMMC_SOURCES}
156
157ifeq (${DRIVER_EMMC_ENABLE_DATA_WIDTH_8BIT},)
158$(eval $(call add_define,DRIVER_EMMC_ENABLE_DATA_WIDTH_8BIT))
159endif
160endif
161
162BL2_SOURCES		+=	plat/brcm/common/brcm_bl2_mem_params_desc.c \
163				plat/brcm/common/brcm_image_load.c \
164				common/desc_image_load.c
165
166BL2_SOURCES		+= 	plat/brcm/common/brcm_bl2_setup.c
167
168BL31_SOURCES		+=	plat/brcm/common/brcm_bl31_setup.c
169
170ifeq (${BCM_ELOG},yes)
171ELOG_SOURCES		+= 	plat/brcm/board/common/bcm_elog.c
172BL2_SOURCES		+= 	${ELOG_SOURCES}
173BL31_SOURCES		+= 	${ELOG_SOURCES}
174endif
175
176# Add spi driver
177ifeq (${DRIVER_SPI_ENABLE},1)
178PLAT_BL_COMMON_SOURCES	+=	drivers/brcm/spi/iproc_spi.c \
179				drivers/brcm/spi/iproc_qspi.c
180endif
181
182# Add spi nor/flash driver
183ifeq (${DRIVER_SPI_NOR_ENABLE},1)
184PLAT_BL_COMMON_SOURCES	+=	drivers/brcm/spi_sf.c \
185				drivers/brcm/spi_flash.c
186endif
187
188ifeq (${DRIVER_I2C_ENABLE},1)
189$(eval $(call add_define,DRIVER_I2C_ENABLE))
190BL2_SOURCES		+= 	drivers/brcm/i2c/i2c.c
191PLAT_INCLUDES		+=	-Iinclude/drivers/brcm/i2c
192endif
193
194ifeq (${DRIVER_OCOTP_ENABLE},1)
195$(eval $(call add_define,DRIVER_OCOTP_ENABLE))
196BL2_SOURCES		+= drivers/brcm/ocotp.c
197endif
198
199# Enable FRU table support
200ifeq (${USE_FRU},yes)
201$(eval $(call add_define,USE_FRU))
202BL2_SOURCES		+= drivers/brcm/fru.c
203endif
204
205# Enable GPIO support
206ifeq (${USE_GPIO},yes)
207$(eval $(call add_define,USE_GPIO))
208BL2_SOURCES             += drivers/gpio/gpio.c
209BL2_SOURCES             += drivers/brcm/iproc_gpio.c
210ifeq (${GPIO_SUPPORT_FLOAT_DETECTION},yes)
211$(eval $(call add_define,GPIO_SUPPORT_FLOAT_DETECTION))
212endif
213endif
214
215# Include mbedtls if it can be located
216MBEDTLS_DIR := mbedtls
217MBEDTLS_CHECK := $(shell find ${MBEDTLS_DIR}/include -name '${MBEDTLS_DIR}')
218
219ifneq (${MBEDTLS_CHECK},)
220$(info Found mbedTLS at ${MBEDTLS_DIR})
221PLAT_INCLUDES += -I${MBEDTLS_DIR}/include/mbedtls
222# Specify mbedTLS configuration file
223MBEDTLS_CONFIG_FILE	:=	"<brcm_mbedtls_config.h>"
224
225# By default, use RSA keys
226KEY_ALG := rsa_1_5
227
228# Include common TBB sources
229AUTH_SOURCES	+= 	drivers/auth/auth_mod.c \
230			drivers/auth/crypto_mod.c \
231			drivers/auth/img_parser_mod.c \
232			drivers/auth/tbbr/tbbr_cot_common.c \
233			drivers/auth/tbbr/tbbr_cot_bl2.c
234
235BL2_SOURCES	+=	${AUTH_SOURCES}
236
237# Use ATF framework for MBEDTLS
238TRUSTED_BOARD_BOOT := 1
239CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
240IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
241$(info Including ${CRYPTO_LIB_MK})
242include ${CRYPTO_LIB_MK}
243$(info Including ${IMG_PARSER_LIB_MK})
244include ${IMG_PARSER_LIB_MK}
245
246# Use ATF secure boot functions
247# Use Hardcoded hash for devel
248
249ARM_ROTPK_LOCATION=arm_rsa
250ifeq (${ARM_ROTPK_LOCATION}, arm_rsa)
251ARM_ROTPK_LOCATION_ID=ARM_ROTPK_DEVEL_RSA_ID
252ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
253else ifeq (${ARM_ROTPK_LOCATION}, brcm_rsa)
254ARM_ROTPK_LOCATION_ID=BRCM_ROTPK_SOTP_RSA_ID
255ifeq (${ROT_KEY},)
256ROT_KEY=plat/brcm/board/common/rotpk/rsa_dauth2048_key.pem
257endif
258KEY_FIND := $(shell m="${ROT_KEY}"; [ -f "$$m" ] && echo "$$m")
259ifeq (${KEY_FIND},)
260$(error Error: No ${ROT_KEY} located)
261else
262$(info Using ROT_KEY: ${ROT_KEY})
263endif
264else
265$(error "Unsupported ARM_ROTPK_LOCATION value")
266endif
267
268$(eval $(call add_define,ARM_ROTPK_LOCATION_ID))
269PLAT_BL_COMMON_SOURCES+=plat/brcm/board/common/board_arm_trusted_boot.c
270endif
271
272#M0 runtime firmware
273ifdef SCP_BL2
274$(eval $(call add_define,NEED_SCP_BL2))
275SCP_CFG_DIR=$(dir ${SCP_BL2})
276PLAT_INCLUDES += -I${SCP_CFG_DIR}
277endif
278
279ifneq (${NEED_BL33},yes)
280# If there is no BL33, BL31 will jump to this address.
281ifeq (${USE_DDR},yes)
282PRELOADED_BL33_BASE := 0x80000000
283else
284PRELOADED_BL33_BASE := 0x74000000
285endif
286endif
287
288# Use translation tables library v1 by default
289ARM_XLAT_TABLES_LIB_V1		:=	1
290ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
291$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
292$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
293PLAT_BL_COMMON_SOURCES	+=	lib/xlat_tables/aarch64/xlat_tables.c \
294				lib/xlat_tables/xlat_tables_common.c
295endif
296