1# 2# Copyright (c) 2015 - 2020, Broadcom 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7PLAT_BL_COMMON_SOURCES += plat/brcm/board/common/board_common.c 8 9# If no board config makefile, do not include it 10ifneq (${BOARD_CFG},) 11BOARD_CFG_MAKE := $(shell find plat/brcm/board/${PLAT} -name '${BOARD_CFG}.mk') 12$(eval $(call add_define,BOARD_CFG)) 13ifneq (${BOARD_CFG_MAKE},) 14$(info Including ${BOARD_CFG_MAKE}) 15include ${BOARD_CFG_MAKE} 16else 17$(error Error: File ${BOARD_CFG}.mk not found in plat/brcm/board/${PLAT}) 18endif 19endif 20 21# To compile with highest log level (VERBOSE) set value to 50 22LOG_LEVEL := 40 23 24# Use custom generic timer clock 25ifneq (${GENTIMER_ACTUAL_CLOCK},) 26$(info Using GENTIMER_ACTUAL_CLOCK=$(GENTIMER_ACTUAL_CLOCK)) 27SYSCNT_FREQ := $(GENTIMER_ACTUAL_CLOCK) 28$(eval $(call add_define,SYSCNT_FREQ)) 29endif 30 31ifeq (${DRIVER_EMMC_ENABLE},) 32DRIVER_EMMC_ENABLE :=1 33endif 34 35ifeq (${DRIVER_SPI_ENABLE},) 36DRIVER_SPI_ENABLE := 0 37endif 38 39# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set 40ifeq (${BRCM_DISABLE_TRUSTED_WDOG},) 41BRCM_DISABLE_TRUSTED_WDOG := 0 42endif 43ifeq (${SPIN_ON_BL1_EXIT}, 1) 44BRCM_DISABLE_TRUSTED_WDOG := 1 45endif 46 47$(eval $(call assert_boolean,BRCM_DISABLE_TRUSTED_WDOG)) 48$(eval $(call add_define,BRCM_DISABLE_TRUSTED_WDOG)) 49 50# Process ARM_BL31_IN_DRAM flag 51ifeq (${ARM_BL31_IN_DRAM},) 52ARM_BL31_IN_DRAM := 0 53endif 54$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 55$(eval $(call add_define,ARM_BL31_IN_DRAM)) 56 57ifeq (${STANDALONE_BL2},yes) 58BL2_LOG_LEVEL := 40 59$(eval $(call add_define,MMU_DISABLED)) 60endif 61 62# BL2 XIP from QSPI 63RUN_BL2_FROM_QSPI := 0 64ifeq (${RUN_BL2_FROM_QSPI},1) 65$(eval $(call add_define,RUN_BL2_FROM_QSPI)) 66endif 67 68# BL2 XIP from NAND 69RUN_BL2_FROM_NAND := 0 70ifeq (${RUN_BL2_FROM_NAND},1) 71$(eval $(call add_define,RUN_BL2_FROM_NAND)) 72endif 73 74ifneq (${ELOG_AP_UART_LOG_BASE},) 75$(eval $(call add_define,ELOG_AP_UART_LOG_BASE)) 76endif 77 78ifeq (${ELOG_SUPPORT},1) 79ifeq (${ELOG_STORE_MEDIA},DDR) 80$(eval $(call add_define,ELOG_STORE_MEDIA_DDR)) 81ifneq (${ELOG_STORE_OFFSET},) 82$(eval $(call add_define,ELOG_STORE_OFFSET)) 83endif 84endif 85endif 86 87ifneq (${BL2_LOG_LEVEL},) 88$(eval $(call add_define,BL2_LOG_LEVEL)) 89endif 90 91ifneq (${BL31_LOG_LEVEL},) 92$(eval $(call add_define,BL31_LOG_LEVEL)) 93endif 94 95# Use CRMU SRAM from iHOST 96ifneq (${USE_CRMU_SRAM},) 97$(eval $(call add_define,USE_CRMU_SRAM)) 98endif 99 100# Use PIO mode if DDR is not used 101ifeq (${USE_DDR},yes) 102EMMC_USE_DMA := 1 103else 104EMMC_USE_DMA := 0 105endif 106$(eval $(call add_define,EMMC_USE_DMA)) 107 108# On BRCM platforms, separate the code and read-only data sections to allow 109# mapping the former as executable and the latter as execute-never. 110SEPARATE_CODE_AND_RODATA := 1 111 112# Use generic OID definition (tbbr_oid.h) 113USE_TBBR_DEFS := 1 114 115PLAT_INCLUDES += -Iplat/brcm/board/common \ 116 -Iinclude/drivers/brcm \ 117 -Iinclude/drivers/brcm/emmc 118 119PLAT_BL_COMMON_SOURCES += plat/brcm/common/brcm_common.c \ 120 plat/brcm/board/common/cmn_sec.c \ 121 plat/brcm/board/common/bcm_console.c \ 122 plat/brcm/board/common/brcm_mbedtls.c \ 123 plat/brcm/board/common/plat_setup.c \ 124 plat/brcm/board/common/platform_common.c \ 125 drivers/arm/sp804/sp804_delay_timer.c \ 126 drivers/brcm/sotp.c \ 127 drivers/delay_timer/delay_timer.c \ 128 drivers/io/io_fip.c \ 129 drivers/io/io_memmap.c \ 130 drivers/io/io_storage.c \ 131 plat/brcm/common/brcm_io_storage.c \ 132 plat/brcm/board/common/err.c \ 133 plat/brcm/board/common/sbl_util.c \ 134 drivers/arm/sp805/sp805.c 135 136# Add eMMC driver 137ifeq (${DRIVER_EMMC_ENABLE},1) 138$(eval $(call add_define,DRIVER_EMMC_ENABLE)) 139 140EMMC_SOURCES += drivers/brcm/emmc/emmc_chal_sd.c \ 141 drivers/brcm/emmc/emmc_csl_sdcard.c \ 142 drivers/brcm/emmc/emmc_csl_sdcmd.c \ 143 drivers/brcm/emmc/emmc_pboot_hal_memory_drv.c 144 145PLAT_BL_COMMON_SOURCES += ${EMMC_SOURCES} 146 147ifeq (${DRIVER_EMMC_ENABLE_DATA_WIDTH_8BIT},) 148$(eval $(call add_define,DRIVER_EMMC_ENABLE_DATA_WIDTH_8BIT)) 149endif 150endif 151 152BL2_SOURCES += plat/brcm/common/brcm_bl2_mem_params_desc.c \ 153 plat/brcm/common/brcm_image_load.c \ 154 common/desc_image_load.c 155 156BL2_SOURCES += plat/brcm/common/brcm_bl2_setup.c 157 158BL31_SOURCES += plat/brcm/common/brcm_bl31_setup.c 159 160ifeq (${BCM_ELOG},yes) 161ELOG_SOURCES += plat/brcm/board/common/bcm_elog.c 162BL2_SOURCES += ${ELOG_SOURCES} 163BL31_SOURCES += ${ELOG_SOURCES} 164endif 165 166# Add spi driver 167ifeq (${DRIVER_SPI_ENABLE},1) 168PLAT_BL_COMMON_SOURCES += drivers/brcm/spi/iproc_spi.c \ 169 drivers/brcm/spi/iproc_qspi.c 170endif 171 172# Add spi nor/flash driver 173ifeq (${DRIVER_SPI_NOR_ENABLE},1) 174PLAT_BL_COMMON_SOURCES += drivers/brcm/spi_sf.c \ 175 drivers/brcm/spi_flash.c 176endif 177 178ifeq (${DRIVER_OCOTP_ENABLE},1) 179$(eval $(call add_define,DRIVER_OCOTP_ENABLE)) 180BL2_SOURCES += drivers/brcm/ocotp.c 181endif 182 183# Enable FRU table support 184ifeq (${USE_FRU},yes) 185$(eval $(call add_define,USE_FRU)) 186BL2_SOURCES += drivers/brcm/fru.c 187endif 188 189# Enable GPIO support 190ifeq (${USE_GPIO},yes) 191$(eval $(call add_define,USE_GPIO)) 192BL2_SOURCES += drivers/gpio/gpio.c 193BL2_SOURCES += drivers/brcm/iproc_gpio.c 194ifeq (${GPIO_SUPPORT_FLOAT_DETECTION},yes) 195$(eval $(call add_define,GPIO_SUPPORT_FLOAT_DETECTION)) 196endif 197endif 198 199# Include mbedtls if it can be located 200MBEDTLS_DIR := mbedtls 201MBEDTLS_CHECK := $(shell find ${MBEDTLS_DIR}/include -name '${MBEDTLS_DIR}') 202 203ifneq (${MBEDTLS_CHECK},) 204$(info Found mbedTLS at ${MBEDTLS_DIR}) 205PLAT_INCLUDES += -I${MBEDTLS_DIR}/include/mbedtls 206# Specify mbedTLS configuration file 207MBEDTLS_CONFIG_FILE := "<brcm_mbedtls_config.h>" 208 209# By default, use RSA keys 210KEY_ALG := rsa_1_5 211 212# Include common TBB sources 213AUTH_SOURCES += drivers/auth/auth_mod.c \ 214 drivers/auth/crypto_mod.c \ 215 drivers/auth/img_parser_mod.c \ 216 drivers/auth/tbbr/tbbr_cot.c 217 218BL2_SOURCES += ${AUTH_SOURCES} 219 220# Use ATF framework for MBEDTLS 221TRUSTED_BOARD_BOOT := 1 222CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 223IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 224$(info Including ${CRYPTO_LIB_MK}) 225include ${CRYPTO_LIB_MK} 226$(info Including ${IMG_PARSER_LIB_MK}) 227include ${IMG_PARSER_LIB_MK} 228 229# Use ATF secure boot functions 230# Use Hardcoded hash for devel 231 232ARM_ROTPK_LOCATION=arm_rsa 233ifeq (${ARM_ROTPK_LOCATION}, arm_rsa) 234ARM_ROTPK_LOCATION_ID=ARM_ROTPK_DEVEL_RSA_ID 235ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem 236else ifeq (${ARM_ROTPK_LOCATION}, brcm_rsa) 237ARM_ROTPK_LOCATION_ID=BRCM_ROTPK_SOTP_RSA_ID 238ifeq (${ROT_KEY},) 239ROT_KEY=plat/brcm/board/common/rotpk/rsa_dauth2048_key.pem 240endif 241KEY_FIND := $(shell m="${ROT_KEY}"; [ -f "$$m" ] && echo "$$m") 242ifeq (${KEY_FIND},) 243$(error Error: No ${ROT_KEY} located) 244else 245$(info Using ROT_KEY: ${ROT_KEY}) 246endif 247else 248$(error "Unsupported ARM_ROTPK_LOCATION value") 249endif 250 251$(eval $(call add_define,ARM_ROTPK_LOCATION_ID)) 252PLAT_BL_COMMON_SOURCES+=plat/brcm/board/common/board_arm_trusted_boot.c 253endif 254 255#M0 runtime firmware 256ifdef SCP_BL2 257$(eval $(call add_define,NEED_SCP_BL2)) 258SCP_CFG_DIR=$(dir ${SCP_BL2}) 259PLAT_INCLUDES += -I${SCP_CFG_DIR} 260endif 261 262ifneq (${NEED_BL33},yes) 263# If there is no BL33, BL31 will jump to this address. 264ifeq (${USE_DDR},yes) 265PRELOADED_BL33_BASE := 0x80000000 266else 267PRELOADED_BL33_BASE := 0x74000000 268endif 269endif 270 271# Use translation tables library v1 by default 272ARM_XLAT_TABLES_LIB_V1 := 1 273ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 274$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 275$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 276PLAT_BL_COMMON_SOURCES += lib/xlat_tables/aarch64/xlat_tables.c \ 277 lib/xlat_tables/xlat_tables_common.c 278endif 279