1*85f199b7SChia-Wei Wang/* 2*85f199b7SChia-Wei Wang * Copyright (c) 2023, Aspeed Technology Inc. 3*85f199b7SChia-Wei Wang * 4*85f199b7SChia-Wei Wang * SPDX-License-Identifier: BSD-3-Clause 5*85f199b7SChia-Wei Wang */ 6*85f199b7SChia-Wei Wang 7*85f199b7SChia-Wei Wang#include <asm_macros.S> 8*85f199b7SChia-Wei Wang#include <assert_macros.S> 9*85f199b7SChia-Wei Wang#include <arch.h> 10*85f199b7SChia-Wei Wang#include <cortex_a35.h> 11*85f199b7SChia-Wei Wang#include <platform_def.h> 12*85f199b7SChia-Wei Wang 13*85f199b7SChia-Wei Wang .globl plat_is_my_cpu_primary 14*85f199b7SChia-Wei Wang .globl plat_my_core_pos 15*85f199b7SChia-Wei Wang .globl plat_secondary_cold_boot_setup 16*85f199b7SChia-Wei Wang .globl plat_get_syscnt_freq2 17*85f199b7SChia-Wei Wang .globl plat_crash_console_init 18*85f199b7SChia-Wei Wang .globl plat_crash_console_putc 19*85f199b7SChia-Wei Wang .globl plat_crash_console_flush 20*85f199b7SChia-Wei Wang 21*85f199b7SChia-Wei Wang/* unsigned int plat_is_my_cpu_primary(void); */ 22*85f199b7SChia-Wei Wangfunc plat_is_my_cpu_primary 23*85f199b7SChia-Wei Wang mrs x0, mpidr_el1 24*85f199b7SChia-Wei Wang and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) 25*85f199b7SChia-Wei Wang cmp x0, #PLATFORM_CORE_PRIMARY 26*85f199b7SChia-Wei Wang cset w0, eq 27*85f199b7SChia-Wei Wang ret 28*85f199b7SChia-Wei Wangendfunc plat_is_my_cpu_primary 29*85f199b7SChia-Wei Wang 30*85f199b7SChia-Wei Wang/* unsigned int plat_my_core_pos(void); */ 31*85f199b7SChia-Wei Wangfunc plat_my_core_pos 32*85f199b7SChia-Wei Wang mrs x0, mpidr_el1 33*85f199b7SChia-Wei Wang mov x2, #PLATFORM_CORE_COUNT_PER_CLUSTER 34*85f199b7SChia-Wei Wang and x1, x0, #MPIDR_CPU_MASK 35*85f199b7SChia-Wei Wang and x0, x0, #MPIDR_CLUSTER_MASK 36*85f199b7SChia-Wei Wang madd x0, x0, x2, x1 37*85f199b7SChia-Wei Wang ret 38*85f199b7SChia-Wei Wangendfunc plat_my_core_pos 39*85f199b7SChia-Wei Wang 40*85f199b7SChia-Wei Wang/* unsigned int plat_get_syscnt_freq2(void); */ 41*85f199b7SChia-Wei Wangfunc plat_get_syscnt_freq2 42*85f199b7SChia-Wei Wang mov_imm w0, PLAT_SYSCNT_CLKIN_HZ 43*85f199b7SChia-Wei Wang ret 44*85f199b7SChia-Wei Wangendfunc plat_get_syscnt_freq2 45*85f199b7SChia-Wei Wang 46*85f199b7SChia-Wei Wang/* int plat_crash_console_init(void); */ 47*85f199b7SChia-Wei Wangfunc plat_crash_console_init 48*85f199b7SChia-Wei Wang mov_imm x0, CONSOLE_UART_BASE 49*85f199b7SChia-Wei Wang mov_imm x1, CONSOLE_UART_CLKIN_HZ 50*85f199b7SChia-Wei Wang mov_imm x2, CONSOLE_UART_BAUDRATE 51*85f199b7SChia-Wei Wang b console_16550_core_init 52*85f199b7SChia-Wei Wangendfunc plat_crash_console_init 53*85f199b7SChia-Wei Wang 54*85f199b7SChia-Wei Wang/* int plat_crash_console_putc(int); */ 55*85f199b7SChia-Wei Wangfunc plat_crash_console_putc 56*85f199b7SChia-Wei Wang mov_imm x1, CONSOLE_UART_BASE 57*85f199b7SChia-Wei Wang b console_16550_core_putc 58*85f199b7SChia-Wei Wangendfunc plat_crash_console_putc 59*85f199b7SChia-Wei Wang 60*85f199b7SChia-Wei Wang/* void plat_crash_console_flush(void); */ 61*85f199b7SChia-Wei Wangfunc plat_crash_console_flush 62*85f199b7SChia-Wei Wang mov_imm x0, CONSOLE_UART_BASE 63*85f199b7SChia-Wei Wang b console_16550_core_flush 64*85f199b7SChia-Wei Wangendfunc plat_crash_console_flush 65