1 /* 2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <board_css_def.h> 32 #include <mmio.h> 33 #include <platform_def.h> 34 #include <soc_css_def.h> 35 36 /* 37 * Address of slave 'n' security setting in the NIC-400 address region 38 * control 39 * TODO: Ideally this macro should be moved in a "nic-400.h" header file but 40 * it would be the only thing in there so it's not worth it at the moment. 41 */ 42 #define NIC400_ADDR_CTRL_SECURITY_REG(n) (0x8 + (n) * 4) 43 44 void soc_css_init_nic400(void) 45 { 46 /* 47 * NIC-400 Access Control Initialization 48 * 49 * Define access privileges by setting each corresponding bit to: 50 * 0 = Secure access only 51 * 1 = Non-secure access allowed 52 */ 53 54 /* 55 * Allow non-secure access to some SOC regions, excluding UART1, which 56 * remains secure. 57 * Note: This is the NIC-400 device on the SOC 58 */ 59 mmio_write_32(SOC_CSS_NIC400_BASE + 60 NIC400_ADDR_CTRL_SECURITY_REG(SOC_CSS_NIC400_USB_EHCI), ~0); 61 mmio_write_32(SOC_CSS_NIC400_BASE + 62 NIC400_ADDR_CTRL_SECURITY_REG(SOC_CSS_NIC400_TLX_MASTER), ~0); 63 mmio_write_32(SOC_CSS_NIC400_BASE + 64 NIC400_ADDR_CTRL_SECURITY_REG(SOC_CSS_NIC400_USB_OHCI), ~0); 65 mmio_write_32(SOC_CSS_NIC400_BASE + 66 NIC400_ADDR_CTRL_SECURITY_REG(SOC_CSS_NIC400_PL354_SMC), ~0); 67 mmio_write_32(SOC_CSS_NIC400_BASE + 68 NIC400_ADDR_CTRL_SECURITY_REG(SOC_CSS_NIC400_APB4_BRIDGE), ~0); 69 mmio_write_32(SOC_CSS_NIC400_BASE + 70 NIC400_ADDR_CTRL_SECURITY_REG(SOC_CSS_NIC400_BOOTSEC_BRIDGE), 71 ~SOC_CSS_NIC400_BOOTSEC_BRIDGE_UART1); 72 73 /* 74 * Allow non-secure access to some CSS regions. 75 * Note: This is the NIC-400 device on the CSS 76 */ 77 mmio_write_32(PLAT_SOC_CSS_NIC400_BASE + 78 NIC400_ADDR_CTRL_SECURITY_REG(CSS_NIC400_SLAVE_BOOTSECURE), 79 ~0); 80 } 81 82 83 #define PCIE_SECURE_REG 0x3000 84 /* Mask uses REG and MEM access bits */ 85 #define PCIE_SEC_ACCESS_MASK ((1 << 0) | (1 << 1)) 86 87 void soc_css_init_pcie(void) 88 { 89 #if !PLAT_juno 90 /* 91 * Do not initialize PCIe in emulator environment. 92 * Platform ID register not supported on Juno 93 */ 94 if (BOARD_CSS_GET_PLAT_TYPE(BOARD_CSS_PLAT_ID_REG_ADDR) == 95 BOARD_CSS_PLAT_TYPE_EMULATOR) 96 return; 97 #endif /* PLAT_juno */ 98 99 /* 100 * PCIE Root Complex Security settings to enable non-secure 101 * access to config registers. 102 */ 103 mmio_write_32(SOC_CSS_PCIE_CONTROL_BASE + PCIE_SECURE_REG, 104 PCIE_SEC_ACCESS_MASK); 105 } 106