138dce70fSSoby Mathew /* 2*d8d6cf24SSummer Qin * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 338dce70fSSoby Mathew * 438dce70fSSoby Mathew * Redistribution and use in source and binary forms, with or without 538dce70fSSoby Mathew * modification, are permitted provided that the following conditions are met: 638dce70fSSoby Mathew * 738dce70fSSoby Mathew * Redistributions of source code must retain the above copyright notice, this 838dce70fSSoby Mathew * list of conditions and the following disclaimer. 938dce70fSSoby Mathew * 1038dce70fSSoby Mathew * Redistributions in binary form must reproduce the above copyright notice, 1138dce70fSSoby Mathew * this list of conditions and the following disclaimer in the documentation 1238dce70fSSoby Mathew * and/or other materials provided with the distribution. 1338dce70fSSoby Mathew * 1438dce70fSSoby Mathew * Neither the name of ARM nor the names of its contributors may be used 1538dce70fSSoby Mathew * to endorse or promote products derived from this software without specific 1638dce70fSSoby Mathew * prior written permission. 1738dce70fSSoby Mathew * 1838dce70fSSoby Mathew * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 1938dce70fSSoby Mathew * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2038dce70fSSoby Mathew * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2138dce70fSSoby Mathew * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 2238dce70fSSoby Mathew * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2338dce70fSSoby Mathew * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2438dce70fSSoby Mathew * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2538dce70fSSoby Mathew * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2638dce70fSSoby Mathew * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2738dce70fSSoby Mathew * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 2838dce70fSSoby Mathew * POSSIBILITY OF SUCH DAMAGE. 2938dce70fSSoby Mathew */ 3038dce70fSSoby Mathew 3138dce70fSSoby Mathew #include <plat_arm.h> 3238dce70fSSoby Mathew 33*d8d6cf24SSummer Qin #if ARM_PLAT_MT 34*d8d6cf24SSummer Qin #pragma weak plat_arm_get_cpu_pe_count 35*d8d6cf24SSummer Qin #endif 36*d8d6cf24SSummer Qin 3738dce70fSSoby Mathew /****************************************************************************** 3838dce70fSSoby Mathew * This function implements a part of the critical interface between the psci 3938dce70fSSoby Mathew * generic layer and the platform that allows the former to query the platform 4038dce70fSSoby Mathew * to convert an MPIDR to a unique linear index. An error code (-1) is 4138dce70fSSoby Mathew * returned in case the MPIDR is invalid. 4238dce70fSSoby Mathew *****************************************************************************/ 4338dce70fSSoby Mathew int plat_core_pos_by_mpidr(u_register_t mpidr) 4438dce70fSSoby Mathew { 4538dce70fSSoby Mathew if (arm_check_mpidr(mpidr) == 0) 4638dce70fSSoby Mathew return plat_arm_calc_core_pos(mpidr); 4738dce70fSSoby Mathew 4838dce70fSSoby Mathew return -1; 4938dce70fSSoby Mathew } 50*d8d6cf24SSummer Qin 51*d8d6cf24SSummer Qin #if ARM_PLAT_MT 52*d8d6cf24SSummer Qin /****************************************************************************** 53*d8d6cf24SSummer Qin * This function returns the PE count within the physical cpu corresponding to 54*d8d6cf24SSummer Qin * `mpidr`. Now one cpu only have one thread, so just return 1. 55*d8d6cf24SSummer Qin *****************************************************************************/ 56*d8d6cf24SSummer Qin unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr) 57*d8d6cf24SSummer Qin { 58*d8d6cf24SSummer Qin return 1; 59*d8d6cf24SSummer Qin } 60*d8d6cf24SSummer Qin #endif /* ARM_PLAT_MT */ 61