138dce70fSSoby Mathew /* 2fd116b9fSRoberto Vargas * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 338dce70fSSoby Mathew * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 538dce70fSSoby Mathew */ 638dce70fSSoby Mathew 738dce70fSSoby Mathew #include <plat_arm.h> 8fd116b9fSRoberto Vargas #include <platform.h> 98aaa8634SVishwanatha HG #include <assert.h> 1038dce70fSSoby Mathew 11d8d6cf24SSummer Qin #if ARM_PLAT_MT 12d8d6cf24SSummer Qin #pragma weak plat_arm_get_cpu_pe_count 13d8d6cf24SSummer Qin #endif 14d8d6cf24SSummer Qin 1538dce70fSSoby Mathew /****************************************************************************** 1638dce70fSSoby Mathew * This function implements a part of the critical interface between the psci 1738dce70fSSoby Mathew * generic layer and the platform that allows the former to query the platform 1838dce70fSSoby Mathew * to convert an MPIDR to a unique linear index. An error code (-1) is 1938dce70fSSoby Mathew * returned in case the MPIDR is invalid. 2038dce70fSSoby Mathew *****************************************************************************/ 2138dce70fSSoby Mathew int plat_core_pos_by_mpidr(u_register_t mpidr) 2238dce70fSSoby Mathew { 238aaa8634SVishwanatha HG if (arm_check_mpidr(mpidr) == 0) { 248aaa8634SVishwanatha HG #if ARM_PLAT_MT 258aaa8634SVishwanatha HG assert((read_mpidr_el1() & MPIDR_MT_MASK) != 0); 26*58192800SNariman Poushin 27*58192800SNariman Poushin /* 28*58192800SNariman Poushin * The DTB files don't provide the MT bit in the mpidr argument 29*58192800SNariman Poushin * so set it manually before calculating core position 30*58192800SNariman Poushin */ 31*58192800SNariman Poushin mpidr |= MPIDR_MT_MASK; 328aaa8634SVishwanatha HG #endif 3338dce70fSSoby Mathew return plat_arm_calc_core_pos(mpidr); 348aaa8634SVishwanatha HG } 3538dce70fSSoby Mathew return -1; 3638dce70fSSoby Mathew } 37d8d6cf24SSummer Qin 38d8d6cf24SSummer Qin #if ARM_PLAT_MT 39d8d6cf24SSummer Qin /****************************************************************************** 40d8d6cf24SSummer Qin * This function returns the PE count within the physical cpu corresponding to 41d8d6cf24SSummer Qin * `mpidr`. Now one cpu only have one thread, so just return 1. 42d8d6cf24SSummer Qin *****************************************************************************/ 43d8d6cf24SSummer Qin unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr) 44d8d6cf24SSummer Qin { 45d8d6cf24SSummer Qin return 1; 46d8d6cf24SSummer Qin } 47d8d6cf24SSummer Qin #endif /* ARM_PLAT_MT */ 48