138dce70fSSoby Mathew /* 2fd116b9fSRoberto Vargas * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 338dce70fSSoby Mathew * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 538dce70fSSoby Mathew */ 638dce70fSSoby Mathew 78aaa8634SVishwanatha HG #include <assert.h> 838dce70fSSoby Mathew 9*bd9344f6SAntonio Nino Diaz #include <plat/arm/common/plat_arm.h> 1009d40e0eSAntonio Nino Diaz #include <plat/common/platform.h> 1109d40e0eSAntonio Nino Diaz 12d8d6cf24SSummer Qin #if ARM_PLAT_MT 13d8d6cf24SSummer Qin #pragma weak plat_arm_get_cpu_pe_count 14d8d6cf24SSummer Qin #endif 15d8d6cf24SSummer Qin 1638dce70fSSoby Mathew /****************************************************************************** 1738dce70fSSoby Mathew * This function implements a part of the critical interface between the psci 1838dce70fSSoby Mathew * generic layer and the platform that allows the former to query the platform 1938dce70fSSoby Mathew * to convert an MPIDR to a unique linear index. An error code (-1) is 2038dce70fSSoby Mathew * returned in case the MPIDR is invalid. 2138dce70fSSoby Mathew *****************************************************************************/ plat_core_pos_by_mpidr(u_register_t mpidr)2238dce70fSSoby Mathewint plat_core_pos_by_mpidr(u_register_t mpidr) 2338dce70fSSoby Mathew { 248aaa8634SVishwanatha HG if (arm_check_mpidr(mpidr) == 0) { 258aaa8634SVishwanatha HG #if ARM_PLAT_MT 268aaa8634SVishwanatha HG assert((read_mpidr_el1() & MPIDR_MT_MASK) != 0); 2758192800SNariman Poushin 2858192800SNariman Poushin /* 2958192800SNariman Poushin * The DTB files don't provide the MT bit in the mpidr argument 3058192800SNariman Poushin * so set it manually before calculating core position 3158192800SNariman Poushin */ 3258192800SNariman Poushin mpidr |= MPIDR_MT_MASK; 338aaa8634SVishwanatha HG #endif 3438dce70fSSoby Mathew return plat_arm_calc_core_pos(mpidr); 358aaa8634SVishwanatha HG } 3638dce70fSSoby Mathew return -1; 3738dce70fSSoby Mathew } 38d8d6cf24SSummer Qin 39d8d6cf24SSummer Qin #if ARM_PLAT_MT 40d8d6cf24SSummer Qin /****************************************************************************** 41d8d6cf24SSummer Qin * This function returns the PE count within the physical cpu corresponding to 42d8d6cf24SSummer Qin * `mpidr`. Now one cpu only have one thread, so just return 1. 43d8d6cf24SSummer Qin *****************************************************************************/ plat_arm_get_cpu_pe_count(u_register_t mpidr)44d8d6cf24SSummer Qinunsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr) 45d8d6cf24SSummer Qin { 46d8d6cf24SSummer Qin return 1; 47d8d6cf24SSummer Qin } 48d8d6cf24SSummer Qin #endif /* ARM_PLAT_MT */ 49