1b4315306SDan Handley /* 2308d359bSDouglas Raillard * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3b4315306SDan Handley * 4*82cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5b4315306SDan Handley */ 6b4315306SDan Handley 7b4315306SDan Handley #include <bl_common.h> 84c117f6cSSandrine Bailleux #include <css_def.h> 9b4315306SDan Handley #include <debug.h> 104c117f6cSSandrine Bailleux #include <mmio.h> 114c117f6cSSandrine Bailleux #include <plat_arm.h> 124c117f6cSSandrine Bailleux #include <string.h> 1353d9c9c8SScott Branden #include <utils.h> 14b4315306SDan Handley #include "css_scp_bootloader.h" 15b4315306SDan Handley 16b4315306SDan Handley /* Weak definition may be overridden in specific CSS based platform */ 17a8aa7fecSYatharth Kochar #if LOAD_IMAGE_V2 18a8aa7fecSYatharth Kochar #pragma weak plat_arm_bl2_handle_scp_bl2 19a8aa7fecSYatharth Kochar #else 20f59821d5SJuan Castillo #pragma weak bl2_plat_handle_scp_bl2 21a8aa7fecSYatharth Kochar #endif 22b4315306SDan Handley 23b4315306SDan Handley /******************************************************************************* 24f59821d5SJuan Castillo * Transfer SCP_BL2 from Trusted RAM using the SCP Download protocol. 25b4315306SDan Handley * Return 0 on success, -1 otherwise. 26b4315306SDan Handley ******************************************************************************/ 27a8aa7fecSYatharth Kochar #if LOAD_IMAGE_V2 28a8aa7fecSYatharth Kochar int plat_arm_bl2_handle_scp_bl2(image_info_t *scp_bl2_image_info) 29a8aa7fecSYatharth Kochar #else 30f59821d5SJuan Castillo int bl2_plat_handle_scp_bl2(image_info_t *scp_bl2_image_info) 31a8aa7fecSYatharth Kochar #endif 32b4315306SDan Handley { 33b4315306SDan Handley int ret; 34b4315306SDan Handley 35f59821d5SJuan Castillo INFO("BL2: Initiating SCP_BL2 transfer to SCP\n"); 36e234ba03SSandrine Bailleux 37f59821d5SJuan Castillo ret = scp_bootloader_transfer((void *)scp_bl2_image_info->image_base, 38f59821d5SJuan Castillo scp_bl2_image_info->image_size); 39b4315306SDan Handley 40b4315306SDan Handley if (ret == 0) 41f59821d5SJuan Castillo INFO("BL2: SCP_BL2 transferred to SCP\n"); 42b4315306SDan Handley else 43f59821d5SJuan Castillo ERROR("BL2: SCP_BL2 transfer failure\n"); 44b4315306SDan Handley 45b4315306SDan Handley return ret; 46b4315306SDan Handley } 474c117f6cSSandrine Bailleux 484c117f6cSSandrine Bailleux #ifdef EL3_PAYLOAD_BASE 494c117f6cSSandrine Bailleux /* 504c117f6cSSandrine Bailleux * We need to override some of the platform functions when booting an EL3 514c117f6cSSandrine Bailleux * payload. 524c117f6cSSandrine Bailleux */ 534c117f6cSSandrine Bailleux 544c117f6cSSandrine Bailleux static unsigned int scp_boot_config; 554c117f6cSSandrine Bailleux 564c117f6cSSandrine Bailleux void bl2_early_platform_setup(meminfo_t *mem_layout) 574c117f6cSSandrine Bailleux { 584c117f6cSSandrine Bailleux arm_bl2_early_platform_setup(mem_layout); 594c117f6cSSandrine Bailleux 60f59821d5SJuan Castillo /* Save SCP Boot config before it gets overwritten by SCP_BL2 loading */ 614c117f6cSSandrine Bailleux scp_boot_config = mmio_read_32(SCP_BOOT_CFG_ADDR); 624c117f6cSSandrine Bailleux VERBOSE("BL2: Saved SCP Boot config = 0x%x\n", scp_boot_config); 634c117f6cSSandrine Bailleux } 644c117f6cSSandrine Bailleux 654c117f6cSSandrine Bailleux void bl2_platform_setup(void) 664c117f6cSSandrine Bailleux { 674c117f6cSSandrine Bailleux arm_bl2_platform_setup(); 684c117f6cSSandrine Bailleux 694c117f6cSSandrine Bailleux /* 704c117f6cSSandrine Bailleux * Before releasing the AP cores out of reset, the SCP writes some data 714c117f6cSSandrine Bailleux * at the beginning of the Trusted SRAM. It is is overwritten before 724c117f6cSSandrine Bailleux * reaching this function. We need to restore this data, as if the 734c117f6cSSandrine Bailleux * target had just come out of reset. This implies: 744c117f6cSSandrine Bailleux * - zeroing the first 128 bytes of Trusted SRAM; 754c117f6cSSandrine Bailleux * - restoring the SCP boot configuration. 764c117f6cSSandrine Bailleux */ 774c117f6cSSandrine Bailleux VERBOSE("BL2: Restoring SCP reset data in Trusted SRAM\n"); 78308d359bSDouglas Raillard zero_normalmem((void *)ARM_TRUSTED_SRAM_BASE, 128); 794c117f6cSSandrine Bailleux mmio_write_32(SCP_BOOT_CFG_ADDR, scp_boot_config); 804c117f6cSSandrine Bailleux } 814c117f6cSSandrine Bailleux #endif /* EL3_PAYLOAD_BASE */ 82