1b4315306SDan Handley /* 2*0c306cc0SSoby Mathew * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3b4315306SDan Handley * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5b4315306SDan Handley */ 6b4315306SDan Handley 7b4315306SDan Handley #include <bl_common.h> 84c117f6cSSandrine Bailleux #include <css_def.h> 9b4315306SDan Handley #include <debug.h> 104c117f6cSSandrine Bailleux #include <mmio.h> 114c117f6cSSandrine Bailleux #include <plat_arm.h> 124c117f6cSSandrine Bailleux #include <string.h> 1353d9c9c8SScott Branden #include <utils.h> 1474d44a49SSoby Mathew #include "../drivers/scp/css_scp.h" 15b4315306SDan Handley 16b4315306SDan Handley /* Weak definition may be overridden in specific CSS based platform */ 17a8aa7fecSYatharth Kochar #if LOAD_IMAGE_V2 18a8aa7fecSYatharth Kochar #pragma weak plat_arm_bl2_handle_scp_bl2 19a8aa7fecSYatharth Kochar #else 20f59821d5SJuan Castillo #pragma weak bl2_plat_handle_scp_bl2 21a8aa7fecSYatharth Kochar #endif 22b4315306SDan Handley 23b4315306SDan Handley /******************************************************************************* 24f59821d5SJuan Castillo * Transfer SCP_BL2 from Trusted RAM using the SCP Download protocol. 25b4315306SDan Handley * Return 0 on success, -1 otherwise. 26b4315306SDan Handley ******************************************************************************/ 27a8aa7fecSYatharth Kochar #if LOAD_IMAGE_V2 28a8aa7fecSYatharth Kochar int plat_arm_bl2_handle_scp_bl2(image_info_t *scp_bl2_image_info) 29a8aa7fecSYatharth Kochar #else 30f59821d5SJuan Castillo int bl2_plat_handle_scp_bl2(image_info_t *scp_bl2_image_info) 31a8aa7fecSYatharth Kochar #endif 32b4315306SDan Handley { 33b4315306SDan Handley int ret; 34b4315306SDan Handley 35f59821d5SJuan Castillo INFO("BL2: Initiating SCP_BL2 transfer to SCP\n"); 36e234ba03SSandrine Bailleux 3774d44a49SSoby Mathew ret = css_scp_boot_image_xfer((void *)scp_bl2_image_info->image_base, 38f59821d5SJuan Castillo scp_bl2_image_info->image_size); 39b4315306SDan Handley 40b4315306SDan Handley if (ret == 0) 4174d44a49SSoby Mathew ret = css_scp_boot_ready(); 4274d44a49SSoby Mathew 4374d44a49SSoby Mathew if (ret == 0) 44f59821d5SJuan Castillo INFO("BL2: SCP_BL2 transferred to SCP\n"); 45b4315306SDan Handley else 46f59821d5SJuan Castillo ERROR("BL2: SCP_BL2 transfer failure\n"); 47b4315306SDan Handley 48b4315306SDan Handley return ret; 49b4315306SDan Handley } 504c117f6cSSandrine Bailleux 5118e279ebSSoby Mathew #if !CSS_USE_SCMI_SDS_DRIVER 52a9f9b608SSoby Mathew # if defined(EL3_PAYLOAD_BASE) || JUNO_AARCH32_EL3_RUNTIME 5318e279ebSSoby Mathew 544c117f6cSSandrine Bailleux /* 554c117f6cSSandrine Bailleux * We need to override some of the platform functions when booting an EL3 56a9f9b608SSoby Mathew * payload or SP_MIN on Juno AArch32. This needs to be done only for 57a9f9b608SSoby Mathew * SCPI/BOM SCP systems as in case of SDS, the structures remain in memory and 58a9f9b608SSoby Mathew * don't need to be overwritten. 594c117f6cSSandrine Bailleux */ 604c117f6cSSandrine Bailleux 614c117f6cSSandrine Bailleux static unsigned int scp_boot_config; 624c117f6cSSandrine Bailleux 63*0c306cc0SSoby Mathew void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, 64*0c306cc0SSoby Mathew u_register_t arg2, u_register_t arg3) 654c117f6cSSandrine Bailleux { 66*0c306cc0SSoby Mathew arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1); 674c117f6cSSandrine Bailleux 68f59821d5SJuan Castillo /* Save SCP Boot config before it gets overwritten by SCP_BL2 loading */ 694c117f6cSSandrine Bailleux scp_boot_config = mmio_read_32(SCP_BOOT_CFG_ADDR); 704c117f6cSSandrine Bailleux VERBOSE("BL2: Saved SCP Boot config = 0x%x\n", scp_boot_config); 714c117f6cSSandrine Bailleux } 724c117f6cSSandrine Bailleux 734c117f6cSSandrine Bailleux void bl2_platform_setup(void) 744c117f6cSSandrine Bailleux { 754c117f6cSSandrine Bailleux arm_bl2_platform_setup(); 764c117f6cSSandrine Bailleux 774c117f6cSSandrine Bailleux /* 784c117f6cSSandrine Bailleux * Before releasing the AP cores out of reset, the SCP writes some data 794c117f6cSSandrine Bailleux * at the beginning of the Trusted SRAM. It is is overwritten before 804c117f6cSSandrine Bailleux * reaching this function. We need to restore this data, as if the 814c117f6cSSandrine Bailleux * target had just come out of reset. This implies: 82a1f5a9e5SRoberto Vargas * - zeroing the first 128 bytes of Trusted SRAM using zeromem instead 83a1f5a9e5SRoberto Vargas * of zero_normalmem since this is device memory. 844c117f6cSSandrine Bailleux * - restoring the SCP boot configuration. 854c117f6cSSandrine Bailleux */ 864c117f6cSSandrine Bailleux VERBOSE("BL2: Restoring SCP reset data in Trusted SRAM\n"); 87a1f5a9e5SRoberto Vargas zeromem((void *) ARM_SHARED_RAM_BASE, 128); 884c117f6cSSandrine Bailleux mmio_write_32(SCP_BOOT_CFG_ADDR, scp_boot_config); 894c117f6cSSandrine Bailleux } 9018e279ebSSoby Mathew 914c117f6cSSandrine Bailleux # endif /* EL3_PAYLOAD_BASE */ 9218e279ebSSoby Mathew 9318e279ebSSoby Mathew #endif /* CSS_USE_SCMI_SDS_DRIVER */ 94