1b4315306SDan Handley /* 20c306cc0SSoby Mathew * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3b4315306SDan Handley * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5b4315306SDan Handley */ 6b4315306SDan Handley 74c117f6cSSandrine Bailleux #include <string.h> 8*09d40e0eSAntonio Nino Diaz 9*09d40e0eSAntonio Nino Diaz #include <common/bl_common.h> 10*09d40e0eSAntonio Nino Diaz #include <common/debug.h> 11*09d40e0eSAntonio Nino Diaz #include <lib/mmio.h> 12*09d40e0eSAntonio Nino Diaz #include <lib/utils.h> 13*09d40e0eSAntonio Nino Diaz 14*09d40e0eSAntonio Nino Diaz #include <css_def.h> 15*09d40e0eSAntonio Nino Diaz #include <plat_arm.h> 16*09d40e0eSAntonio Nino Diaz 1774d44a49SSoby Mathew #include "../drivers/scp/css_scp.h" 18b4315306SDan Handley 19b4315306SDan Handley /* Weak definition may be overridden in specific CSS based platform */ 20a8aa7fecSYatharth Kochar #pragma weak plat_arm_bl2_handle_scp_bl2 21b4315306SDan Handley 22b4315306SDan Handley /******************************************************************************* 23f59821d5SJuan Castillo * Transfer SCP_BL2 from Trusted RAM using the SCP Download protocol. 24b4315306SDan Handley * Return 0 on success, -1 otherwise. 25b4315306SDan Handley ******************************************************************************/ 26a8aa7fecSYatharth Kochar int plat_arm_bl2_handle_scp_bl2(image_info_t *scp_bl2_image_info) 27b4315306SDan Handley { 28b4315306SDan Handley int ret; 29b4315306SDan Handley 30f59821d5SJuan Castillo INFO("BL2: Initiating SCP_BL2 transfer to SCP\n"); 31e234ba03SSandrine Bailleux 3274d44a49SSoby Mathew ret = css_scp_boot_image_xfer((void *)scp_bl2_image_info->image_base, 33f59821d5SJuan Castillo scp_bl2_image_info->image_size); 34b4315306SDan Handley 35b4315306SDan Handley if (ret == 0) 3674d44a49SSoby Mathew ret = css_scp_boot_ready(); 3774d44a49SSoby Mathew 3874d44a49SSoby Mathew if (ret == 0) 39f59821d5SJuan Castillo INFO("BL2: SCP_BL2 transferred to SCP\n"); 40b4315306SDan Handley else 41f59821d5SJuan Castillo ERROR("BL2: SCP_BL2 transfer failure\n"); 42b4315306SDan Handley 43b4315306SDan Handley return ret; 44b4315306SDan Handley } 454c117f6cSSandrine Bailleux 4618e279ebSSoby Mathew #if !CSS_USE_SCMI_SDS_DRIVER 47a9f9b608SSoby Mathew # if defined(EL3_PAYLOAD_BASE) || JUNO_AARCH32_EL3_RUNTIME 4818e279ebSSoby Mathew 494c117f6cSSandrine Bailleux /* 504c117f6cSSandrine Bailleux * We need to override some of the platform functions when booting an EL3 51a9f9b608SSoby Mathew * payload or SP_MIN on Juno AArch32. This needs to be done only for 52a9f9b608SSoby Mathew * SCPI/BOM SCP systems as in case of SDS, the structures remain in memory and 53a9f9b608SSoby Mathew * don't need to be overwritten. 544c117f6cSSandrine Bailleux */ 554c117f6cSSandrine Bailleux 564c117f6cSSandrine Bailleux static unsigned int scp_boot_config; 574c117f6cSSandrine Bailleux 580c306cc0SSoby Mathew void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, 590c306cc0SSoby Mathew u_register_t arg2, u_register_t arg3) 604c117f6cSSandrine Bailleux { 610c306cc0SSoby Mathew arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1); 624c117f6cSSandrine Bailleux 63f59821d5SJuan Castillo /* Save SCP Boot config before it gets overwritten by SCP_BL2 loading */ 644c117f6cSSandrine Bailleux scp_boot_config = mmio_read_32(SCP_BOOT_CFG_ADDR); 654c117f6cSSandrine Bailleux VERBOSE("BL2: Saved SCP Boot config = 0x%x\n", scp_boot_config); 664c117f6cSSandrine Bailleux } 674c117f6cSSandrine Bailleux 684c117f6cSSandrine Bailleux void bl2_platform_setup(void) 694c117f6cSSandrine Bailleux { 704c117f6cSSandrine Bailleux arm_bl2_platform_setup(); 714c117f6cSSandrine Bailleux 724c117f6cSSandrine Bailleux /* 734c117f6cSSandrine Bailleux * Before releasing the AP cores out of reset, the SCP writes some data 744c117f6cSSandrine Bailleux * at the beginning of the Trusted SRAM. It is is overwritten before 754c117f6cSSandrine Bailleux * reaching this function. We need to restore this data, as if the 764c117f6cSSandrine Bailleux * target had just come out of reset. This implies: 77a1f5a9e5SRoberto Vargas * - zeroing the first 128 bytes of Trusted SRAM using zeromem instead 78a1f5a9e5SRoberto Vargas * of zero_normalmem since this is device memory. 794c117f6cSSandrine Bailleux * - restoring the SCP boot configuration. 804c117f6cSSandrine Bailleux */ 814c117f6cSSandrine Bailleux VERBOSE("BL2: Restoring SCP reset data in Trusted SRAM\n"); 82a1f5a9e5SRoberto Vargas zeromem((void *) ARM_SHARED_RAM_BASE, 128); 834c117f6cSSandrine Bailleux mmio_write_32(SCP_BOOT_CFG_ADDR, scp_boot_config); 844c117f6cSSandrine Bailleux } 8518e279ebSSoby Mathew 864c117f6cSSandrine Bailleux # endif /* EL3_PAYLOAD_BASE */ 8718e279ebSSoby Mathew 8818e279ebSSoby Mathew #endif /* CSS_USE_SCMI_SDS_DRIVER */ 89