1/* 2 * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30#include <arch.h> 31#include <asm_macros.S> 32#include <cpu_macros.S> 33#include <css_def.h> 34 35 .weak plat_secondary_cold_boot_setup 36 .weak plat_get_my_entrypoint 37 .globl plat_arm_calc_core_pos 38 .weak plat_is_my_cpu_primary 39 40 /* ----------------------------------------------------- 41 * void plat_secondary_cold_boot_setup (void); 42 * 43 * This function performs any platform specific actions 44 * needed for a secondary cpu after a cold reset e.g 45 * mark the cpu's presence, mechanism to place it in a 46 * holding pen etc. 47 * ----------------------------------------------------- 48 */ 49func plat_secondary_cold_boot_setup 50 /* todo: Implement secondary CPU cold boot setup on CSS platforms */ 51cb_panic: 52 b cb_panic 53endfunc plat_secondary_cold_boot_setup 54 55 /* --------------------------------------------------------------------- 56 * unsigned long plat_get_my_entrypoint (void); 57 * 58 * Main job of this routine is to distinguish between a cold and a warm 59 * boot. On CSS platforms, this distinction is based on the contents of 60 * the Trusted Mailbox. It is initialised to zero by the SCP before the 61 * AP cores are released from reset. Therefore, a zero mailbox means 62 * it's a cold reset. 63 * 64 * This functions returns the contents of the mailbox, i.e.: 65 * - 0 for a cold boot; 66 * - the warm boot entrypoint for a warm boot. 67 * --------------------------------------------------------------------- 68 */ 69func plat_get_my_entrypoint 70 mov_imm x0, TRUSTED_MAILBOX_BASE 71 ldr x0, [x0] 72 ret 73endfunc plat_get_my_entrypoint 74 75 /* ----------------------------------------------------------- 76 * unsigned int plat_arm_calc_core_pos(uint64_t mpidr) 77 * Function to calculate the core position by 78 * swapping the cluster order. This is necessary in order to 79 * match the format of the boot information passed by the SCP 80 * and read in plat_is_my_cpu_primary below. 81 * ----------------------------------------------------------- 82 */ 83func plat_arm_calc_core_pos 84 and x1, x0, #MPIDR_CPU_MASK 85 and x0, x0, #MPIDR_CLUSTER_MASK 86 eor x0, x0, #(1 << MPIDR_AFFINITY_BITS) // swap cluster order 87 add x0, x1, x0, LSR #6 88 ret 89endfunc plat_arm_calc_core_pos 90 91 /* ----------------------------------------------------- 92 * unsigned int plat_is_my_cpu_primary (void); 93 * 94 * Find out whether the current cpu is the primary 95 * cpu (applicable ony after a cold boot) 96 * ----------------------------------------------------- 97 */ 98func plat_is_my_cpu_primary 99 mov x9, x30 100 bl plat_my_core_pos 101 ldr x1, =SCP_BOOT_CFG_ADDR 102 ldr x1, [x1] 103 ubfx x1, x1, #PRIMARY_CPU_SHIFT, #PRIMARY_CPU_BIT_WIDTH 104 cmp x0, x1 105 cset w0, eq 106 ret x9 107endfunc plat_is_my_cpu_primary 108