1/* 2 * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30#include <arch.h> 31#include <asm_macros.S> 32#include <cpu_macros.S> 33#include <css_def.h> 34 35 .weak plat_secondary_cold_boot_setup 36 .weak platform_get_entrypoint 37 .weak platform_mem_init 38 .globl platform_get_core_pos 39 .weak platform_is_primary_cpu 40 41 42 /* ----------------------------------------------------- 43 * void plat_secondary_cold_boot_setup (void); 44 * 45 * This function performs any platform specific actions 46 * needed for a secondary cpu after a cold reset e.g 47 * mark the cpu's presence, mechanism to place it in a 48 * holding pen etc. 49 * ----------------------------------------------------- 50 */ 51func plat_secondary_cold_boot_setup 52 /* todo: Implement secondary CPU cold boot setup on CSS platforms */ 53cb_panic: 54 b cb_panic 55endfunc plat_secondary_cold_boot_setup 56 57 /* ----------------------------------------------------- 58 * void platform_get_entrypoint (unsigned int mpid); 59 * 60 * Main job of this routine is to distinguish between 61 * a cold and warm boot. 62 * On a cold boot the secondaries first wait for the 63 * platform to be initialized after which they are 64 * hotplugged in. The primary proceeds to perform the 65 * platform initialization. 66 * On a warm boot, each cpu jumps to the address in its 67 * mailbox. 68 * 69 * TODO: Not a good idea to save lr in a temp reg 70 * ----------------------------------------------------- 71 */ 72func platform_get_entrypoint 73 mov x9, x30 // lr 74 bl platform_get_core_pos 75 ldr x1, =TRUSTED_MAILBOXES_BASE 76 lsl x0, x0, #TRUSTED_MAILBOX_SHIFT 77 ldr x0, [x1, x0] 78 ret x9 79endfunc platform_get_entrypoint 80 81 /* 82 * Override the default implementation to swap the cluster order. 83 * This is necessary in order to match the format of the boot 84 * information passed by the SCP and read in platform_is_primary_cpu 85 * below. 86 */ 87func platform_get_core_pos 88 and x1, x0, #MPIDR_CPU_MASK 89 and x0, x0, #MPIDR_CLUSTER_MASK 90 eor x0, x0, #(1 << MPIDR_AFFINITY_BITS) // swap cluster order 91 add x0, x1, x0, LSR #6 92 ret 93endfunc platform_get_core_pos 94 95 /* ----------------------------------------------------- 96 * void platform_mem_init(void); 97 * 98 * We don't need to carry out any memory initialization 99 * on CSS platforms. The Secure RAM is accessible straight away. 100 * ----------------------------------------------------- 101 */ 102func platform_mem_init 103 ret 104endfunc platform_mem_init 105 106 /* ----------------------------------------------------- 107 * unsigned int platform_is_primary_cpu (unsigned int mpid); 108 * 109 * Given the mpidr say whether this cpu is the primary 110 * cpu (applicable ony after a cold boot) 111 * ----------------------------------------------------- 112 */ 113func platform_is_primary_cpu 114 mov x9, x30 115 bl platform_get_core_pos 116 ldr x1, =SCP_BOOT_CFG_ADDR 117 ldr x1, [x1] 118 ubfx x1, x1, #PRIMARY_CPU_SHIFT, #PRIMARY_CPU_BIT_WIDTH 119 cmp x0, x1 120 cset x0, eq 121 ret x9 122endfunc platform_is_primary_cpu 123