1/* 2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30#include <arch.h> 31#include <asm_macros.S> 32#include <cpu_macros.S> 33#include <css_def.h> 34 35 .weak plat_secondary_cold_boot_setup 36 .weak plat_get_my_entrypoint 37 .globl css_calc_core_pos_swap_cluster 38 .weak plat_is_my_cpu_primary 39 40 /* --------------------------------------------------------------------- 41 * void plat_secondary_cold_boot_setup(void); 42 * In the normal boot flow, cold-booting secondary 43 * CPUs is not yet implemented and they panic. 44 * --------------------------------------------------------------------- 45 */ 46func plat_secondary_cold_boot_setup 47 /* TODO: Implement secondary CPU cold boot setup on CSS platforms */ 48cb_panic: 49 b cb_panic 50endfunc plat_secondary_cold_boot_setup 51 52 /* --------------------------------------------------------------------- 53 * uintptr_t plat_get_my_entrypoint (void); 54 * 55 * Main job of this routine is to distinguish between a cold and a warm 56 * boot. On CSS platforms, this distinction is based on the contents of 57 * the Trusted Mailbox. It is initialised to zero by the SCP before the 58 * AP cores are released from reset. Therefore, a zero mailbox means 59 * it's a cold reset. 60 * 61 * This functions returns the contents of the mailbox, i.e.: 62 * - 0 for a cold boot; 63 * - the warm boot entrypoint for a warm boot. 64 * --------------------------------------------------------------------- 65 */ 66func plat_get_my_entrypoint 67 ldr r0, =PLAT_ARM_TRUSTED_MAILBOX_BASE 68 ldr r0, [r0] 69 bx lr 70endfunc plat_get_my_entrypoint 71 72 /* ----------------------------------------------------------- 73 * unsigned int css_calc_core_pos_swap_cluster(u_register_t mpidr) 74 * Utility function to calculate the core position by 75 * swapping the cluster order. This is necessary in order to 76 * match the format of the boot information passed by the SCP 77 * and read in plat_is_my_cpu_primary below. 78 * ----------------------------------------------------------- 79 */ 80func css_calc_core_pos_swap_cluster 81 and r1, r0, #MPIDR_CPU_MASK 82 and r0, r0, #MPIDR_CLUSTER_MASK 83 eor r0, r0, #(1 << MPIDR_AFFINITY_BITS) // swap cluster order 84 add r0, r1, r0, LSR #6 85 bx lr 86endfunc css_calc_core_pos_swap_cluster 87 88 /* ----------------------------------------------------- 89 * unsigned int plat_is_my_cpu_primary (void); 90 * 91 * Find out whether the current cpu is the primary 92 * cpu (applicable ony after a cold boot) 93 * ----------------------------------------------------- 94 */ 95func plat_is_my_cpu_primary 96 mov r10, lr 97 bl plat_my_core_pos 98 ldr r1, =SCP_BOOT_CFG_ADDR 99 ldr r1, [r1] 100 ubfx r1, r1, #PLAT_CSS_PRIMARY_CPU_SHIFT, \ 101 #PLAT_CSS_PRIMARY_CPU_BIT_WIDTH 102 cmp r0, r1 103 moveq r0, #1 104 movne r0, #0 105 bx r10 106endfunc plat_is_my_cpu_primary 107