1b4315306SDan Handley /* 2*60e8f3cfSPetre-Ionut Tudor * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. 3b4315306SDan Handley * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5b4315306SDan Handley */ 6b4315306SDan Handley 7d323af9eSDaniel Boulby #include <assert.h> 809d40e0eSAntonio Nino Diaz 9b4315306SDan Handley #include <platform_def.h> 1009d40e0eSAntonio Nino Diaz 1109d40e0eSAntonio Nino Diaz #include <bl32/tsp/platform_tsp.h> 1209d40e0eSAntonio Nino Diaz #include <common/bl_common.h> 1309d40e0eSAntonio Nino Diaz #include <common/debug.h> 1409d40e0eSAntonio Nino Diaz #include <drivers/arm/pl011.h> 1509d40e0eSAntonio Nino Diaz #include <drivers/console.h> 16bd9344f6SAntonio Nino Diaz #include <plat/arm/common/plat_arm.h> 17b4315306SDan Handley 18b4315306SDan Handley /* Weak definitions may be overridden in specific ARM standard platform */ 19b4315306SDan Handley #pragma weak tsp_early_platform_setup 20b4315306SDan Handley #pragma weak tsp_platform_setup 21b4315306SDan Handley #pragma weak tsp_plat_arch_setup 22b4315306SDan Handley 23d323af9eSDaniel Boulby #define MAP_BL_TSP_TOTAL MAP_REGION_FLAT( \ 24d323af9eSDaniel Boulby BL32_BASE, \ 25d323af9eSDaniel Boulby BL32_END - BL32_BASE, \ 26d323af9eSDaniel Boulby MT_MEMORY | MT_RW | MT_SECURE) 27b4315306SDan Handley 28b4315306SDan Handley /******************************************************************************* 29b4315306SDan Handley * Initialize the UART 30b4315306SDan Handley ******************************************************************************/ 3188a0523eSAntonio Nino Diaz static console_pl011_t arm_tsp_runtime_console; 3288a0523eSAntonio Nino Diaz 33b4315306SDan Handley void arm_tsp_early_platform_setup(void) 34b4315306SDan Handley { 35b4315306SDan Handley /* 36b4315306SDan Handley * Initialize a different console than already in use to display 37b4315306SDan Handley * messages from TSP 38b4315306SDan Handley */ 3988a0523eSAntonio Nino Diaz int rc = console_pl011_register(PLAT_ARM_TSP_UART_BASE, 4088a0523eSAntonio Nino Diaz PLAT_ARM_TSP_UART_CLK_IN_HZ, 4188a0523eSAntonio Nino Diaz ARM_CONSOLE_BAUDRATE, 4288a0523eSAntonio Nino Diaz &arm_tsp_runtime_console); 4388a0523eSAntonio Nino Diaz if (rc == 0) 4488a0523eSAntonio Nino Diaz panic(); 4588a0523eSAntonio Nino Diaz 4688a0523eSAntonio Nino Diaz console_set_scope(&arm_tsp_runtime_console.console, 4788a0523eSAntonio Nino Diaz CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME); 48b4315306SDan Handley } 49b4315306SDan Handley 50b4315306SDan Handley void tsp_early_platform_setup(void) 51b4315306SDan Handley { 52b4315306SDan Handley arm_tsp_early_platform_setup(); 53b4315306SDan Handley } 54b4315306SDan Handley 55b4315306SDan Handley /******************************************************************************* 56b4315306SDan Handley * Perform platform specific setup placeholder 57b4315306SDan Handley ******************************************************************************/ 58b4315306SDan Handley void tsp_platform_setup(void) 59b4315306SDan Handley { 6027573c59SAchin Gupta plat_arm_gic_driver_init(); 61b4315306SDan Handley } 62b4315306SDan Handley 63b4315306SDan Handley /******************************************************************************* 64b4315306SDan Handley * Perform the very early platform specific architectural setup here. At the 65b4315306SDan Handley * moment this is only intializes the MMU 66b4315306SDan Handley ******************************************************************************/ 67b4315306SDan Handley void tsp_plat_arch_setup(void) 68b4315306SDan Handley { 69b4315306SDan Handley #if USE_COHERENT_MEM 708aabea33SPaul Beesley /* Ensure ARM platforms don't use coherent memory in TSP */ 71d323af9eSDaniel Boulby assert((BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE) == 0U); 72b4315306SDan Handley #endif 73d323af9eSDaniel Boulby 74d323af9eSDaniel Boulby const mmap_region_t bl_regions[] = { 75d323af9eSDaniel Boulby MAP_BL_TSP_TOTAL, 762ecaafd2SDaniel Boulby ARM_MAP_BL_RO, 77d323af9eSDaniel Boulby {0} 78d323af9eSDaniel Boulby }; 79d323af9eSDaniel Boulby 800916c38dSRoberto Vargas setup_page_tables(bl_regions, plat_arm_get_mmap()); 81b5fa6563SSandrine Bailleux enable_mmu_el1(0); 82*60e8f3cfSPetre-Ionut Tudor 83*60e8f3cfSPetre-Ionut Tudor #if PLAT_RO_XLAT_TABLES 84*60e8f3cfSPetre-Ionut Tudor arm_xlat_make_tables_readonly(); 85*60e8f3cfSPetre-Ionut Tudor #endif 86b4315306SDan Handley } 87