1 /* 2 * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <arm_def.h> 32 #include <debug.h> 33 #include <platform_def.h> 34 #include <tzc400.h> 35 36 37 /* Weak definitions may be overridden in specific ARM standard platform */ 38 #pragma weak plat_arm_security_setup 39 40 41 /******************************************************************************* 42 * Initialize the TrustZone Controller for ARM standard platforms. 43 * Configure: 44 * - Region 0 with no access; 45 * - Region 1 with secure access only; 46 * - the remaining DRAM regions access from the given Non-Secure masters. 47 * 48 * When booting an EL3 payload, this is simplified: we configure region 0 with 49 * secure access only and do not enable any other region. 50 ******************************************************************************/ 51 void arm_tzc400_setup(void) 52 { 53 INFO("Configuring TrustZone Controller\n"); 54 55 tzc400_init(PLAT_ARM_TZC_BASE); 56 57 /* Disable filters. */ 58 tzc400_disable_filters(); 59 60 #ifndef EL3_PAYLOAD_BASE 61 /* Region 0 set to no access by default */ 62 tzc400_configure_region0(TZC_REGION_S_NONE, 0); 63 64 /* Region 1 set to cover Secure part of DRAM */ 65 tzc400_configure_region(PLAT_ARM_TZC_FILTERS, 1, 66 ARM_AP_TZC_DRAM1_BASE, ARM_AP_TZC_DRAM1_END, 67 TZC_REGION_S_RDWR, 68 0); 69 70 /* Region 2 set to cover Non-Secure access to 1st DRAM address range. 71 * Apply the same configuration to given filters in the TZC. */ 72 tzc400_configure_region(PLAT_ARM_TZC_FILTERS, 2, 73 ARM_NS_DRAM1_BASE, ARM_NS_DRAM1_END, 74 TZC_REGION_S_NONE, 75 PLAT_ARM_TZC_NS_DEV_ACCESS); 76 77 /* Region 3 set to cover Non-Secure access to 2nd DRAM address range */ 78 tzc400_configure_region(PLAT_ARM_TZC_FILTERS, 3, 79 ARM_DRAM2_BASE, ARM_DRAM2_END, 80 TZC_REGION_S_NONE, 81 PLAT_ARM_TZC_NS_DEV_ACCESS); 82 #else 83 /* Allow secure access only to DRAM for EL3 payloads. */ 84 tzc400_configure_region0(TZC_REGION_S_RDWR, 0); 85 #endif /* EL3_PAYLOAD_BASE */ 86 87 /* 88 * Raise an exception if a NS device tries to access secure memory 89 * TODO: Add interrupt handling support. 90 */ 91 tzc400_set_action(TZC_ACTION_ERR); 92 93 /* Enable filters. */ 94 tzc400_enable_filters(); 95 } 96 97 void plat_arm_security_setup(void) 98 { 99 arm_tzc400_setup(); 100 } 101