xref: /rk3399_ARM-atf/plat/arm/common/arm_tzc400.c (revision 2403813779d983fc039bcd05cd659520bcaaf75e)
1a9cc84d7SVikram Kanigiri /*
2*4ed16765SSuyash Pathak  * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
3a9cc84d7SVikram Kanigiri  *
482cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
5a9cc84d7SVikram Kanigiri  */
6a9cc84d7SVikram Kanigiri 
709d40e0eSAntonio Nino Diaz #include <platform_def.h>
809d40e0eSAntonio Nino Diaz 
909d40e0eSAntonio Nino Diaz #include <common/debug.h>
1009d40e0eSAntonio Nino Diaz #include <drivers/arm/tzc400.h>
11bd9344f6SAntonio Nino Diaz #include <plat/arm/common/plat_arm.h>
12a9cc84d7SVikram Kanigiri 
13a9cc84d7SVikram Kanigiri /* Weak definitions may be overridden in specific ARM standard platform */
14a9cc84d7SVikram Kanigiri #pragma weak plat_arm_security_setup
15a9cc84d7SVikram Kanigiri 
16a9cc84d7SVikram Kanigiri 
17a9cc84d7SVikram Kanigiri /*******************************************************************************
18a9cc84d7SVikram Kanigiri  * Initialize the TrustZone Controller for ARM standard platforms.
19a9cc84d7SVikram Kanigiri  * When booting an EL3 payload, this is simplified: we configure region 0 with
20a9cc84d7SVikram Kanigiri  * secure access only and do not enable any other region.
21a9cc84d7SVikram Kanigiri  ******************************************************************************/
arm_tzc400_setup(uintptr_t tzc_base,const arm_tzc_regions_info_t * tzc_regions)22*4ed16765SSuyash Pathak void arm_tzc400_setup(uintptr_t tzc_base,
23*4ed16765SSuyash Pathak 			const arm_tzc_regions_info_t *tzc_regions)
24a9cc84d7SVikram Kanigiri {
2523411d2cSSummer Qin #ifndef EL3_PAYLOAD_BASE
26af6491f8SAntonio Nino Diaz 	unsigned int region_index = 1U;
2723411d2cSSummer Qin 	const arm_tzc_regions_info_t *p;
2823411d2cSSummer Qin 	const arm_tzc_regions_info_t init_tzc_regions[] = {
2923411d2cSSummer Qin 		ARM_TZC_REGIONS_DEF,
3023411d2cSSummer Qin 		{0}
3123411d2cSSummer Qin 	};
3223411d2cSSummer Qin #endif
3323411d2cSSummer Qin 
34a9cc84d7SVikram Kanigiri 	INFO("Configuring TrustZone Controller\n");
35a9cc84d7SVikram Kanigiri 
36*4ed16765SSuyash Pathak 	tzc400_init(tzc_base);
37a9cc84d7SVikram Kanigiri 
38a9cc84d7SVikram Kanigiri 	/* Disable filters. */
3957f78201SSoby Mathew 	tzc400_disable_filters();
40a9cc84d7SVikram Kanigiri 
41a9cc84d7SVikram Kanigiri #ifndef EL3_PAYLOAD_BASE
4223411d2cSSummer Qin 	if (tzc_regions == NULL)
4323411d2cSSummer Qin 		p = init_tzc_regions;
4423411d2cSSummer Qin 	else
4523411d2cSSummer Qin 		p = tzc_regions;
46e60f2af9SSoby Mathew 
47a9cc84d7SVikram Kanigiri 	/* Region 0 set to no access by default */
4857f78201SSoby Mathew 	tzc400_configure_region0(TZC_REGION_S_NONE, 0);
49a9cc84d7SVikram Kanigiri 
5023411d2cSSummer Qin 	/* Rest Regions set according to tzc_regions array */
5123411d2cSSummer Qin 	for (; p->base != 0ULL; p++) {
5223411d2cSSummer Qin 		tzc400_configure_region(PLAT_ARM_TZC_FILTERS, region_index,
5323411d2cSSummer Qin 			p->base, p->end, p->sec_attr, p->nsaid_permissions);
5423411d2cSSummer Qin 		region_index++;
5523411d2cSSummer Qin 	}
56a9cc84d7SVikram Kanigiri 
57af6491f8SAntonio Nino Diaz 	INFO("Total %u regions set.\n", region_index);
58e29efeb1SAntonio Nino Diaz 
59e29efeb1SAntonio Nino Diaz #else /* if defined(EL3_PAYLOAD_BASE) */
60e29efeb1SAntonio Nino Diaz 
61fb48b970SSoby Mathew 	/* Allow Secure and Non-secure access to DRAM for EL3 payloads */
62fb48b970SSoby Mathew 	tzc400_configure_region0(TZC_REGION_S_RDWR, PLAT_ARM_TZC_NS_DEV_ACCESS);
63e29efeb1SAntonio Nino Diaz 
64a9cc84d7SVikram Kanigiri #endif /* EL3_PAYLOAD_BASE */
65a9cc84d7SVikram Kanigiri 
66a9cc84d7SVikram Kanigiri 	/*
67a9cc84d7SVikram Kanigiri 	 * Raise an exception if a NS device tries to access secure memory
68a9cc84d7SVikram Kanigiri 	 * TODO: Add interrupt handling support.
69a9cc84d7SVikram Kanigiri 	 */
7057f78201SSoby Mathew 	tzc400_set_action(TZC_ACTION_ERR);
71a9cc84d7SVikram Kanigiri 
72a9cc84d7SVikram Kanigiri 	/* Enable filters. */
7357f78201SSoby Mathew 	tzc400_enable_filters();
74a9cc84d7SVikram Kanigiri }
75a9cc84d7SVikram Kanigiri 
plat_arm_security_setup(void)76a9cc84d7SVikram Kanigiri void plat_arm_security_setup(void)
77a9cc84d7SVikram Kanigiri {
78*4ed16765SSuyash Pathak 	arm_tzc400_setup(PLAT_ARM_TZC_BASE, NULL);
79a9cc84d7SVikram Kanigiri }
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