xref: /rk3399_ARM-atf/plat/arm/common/arm_sip_svc.c (revision ed8f06ddda52bc0333f79e9ff798419e67771ae5)
1 /*
2  * Copyright (c) 2016-2023, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <stdint.h>
8 
9 #include <common/debug.h>
10 #include <common/runtime_svc.h>
11 #include <drivers/arm/ethosn.h>
12 #include <lib/debugfs.h>
13 #include <lib/pmf/pmf.h>
14 #include <plat/arm/common/arm_sip_svc.h>
15 #include <plat/arm/common/plat_arm.h>
16 #if ENABLE_SPMD_LP
17 #include <services/el3_spmd_logical_sp.h>
18 #endif
19 #include <tools_share/uuid.h>
20 
21 /* ARM SiP Service UUID */
22 DEFINE_SVC_UUID2(arm_sip_svc_uid,
23 	0x556d75e2, 0x6033, 0xb54b, 0xb5, 0x75,
24 	0x62, 0x79, 0xfd, 0x11, 0x37, 0xff);
25 
26 static int arm_sip_setup(void)
27 {
28 	if (pmf_setup() != 0) {
29 		return 1;
30 	}
31 
32 #if USE_DEBUGFS
33 
34 	if (debugfs_smc_setup() != 0) {
35 		return 1;
36 	}
37 
38 #endif /* USE_DEBUGFS */
39 
40 #if ETHOSN_NPU_DRIVER
41 
42 	if (ethosn_smc_setup() != 0) {
43 		return 1;
44 	}
45 
46 #endif /* ETHOSN_NPU_DRIVER */
47 
48 	return 0;
49 }
50 
51 /*
52  * This function handles ARM defined SiP Calls
53  */
54 static uintptr_t arm_sip_handler(unsigned int smc_fid,
55 			u_register_t x1,
56 			u_register_t x2,
57 			u_register_t x3,
58 			u_register_t x4,
59 			void *cookie,
60 			void *handle,
61 			u_register_t flags)
62 {
63 	int call_count = 0;
64 
65 #if ENABLE_PMF
66 
67 	/*
68 	 * Dispatch PMF calls to PMF SMC handler and return its return
69 	 * value
70 	 */
71 	if (is_pmf_fid(smc_fid)) {
72 		return pmf_smc_handler(smc_fid, x1, x2, x3, x4, cookie,
73 				handle, flags);
74 	}
75 
76 #endif /* ENABLE_PMF */
77 
78 #if USE_DEBUGFS
79 
80 	if (is_debugfs_fid(smc_fid)) {
81 		return debugfs_smc_handler(smc_fid, x1, x2, x3, x4, cookie,
82 					   handle, flags);
83 	}
84 
85 #endif /* USE_DEBUGFS */
86 
87 #if ETHOSN_NPU_DRIVER
88 
89 	if (is_ethosn_fid(smc_fid)) {
90 		return ethosn_smc_handler(smc_fid, x1, x2, x3, x4, cookie,
91 					  handle, flags);
92 	}
93 
94 #endif /* ETHOSN_NPU_DRIVER */
95 
96 	switch (smc_fid) {
97 	case ARM_SIP_SVC_EXE_STATE_SWITCH: {
98 		/* Execution state can be switched only if EL3 is AArch64 */
99 #ifdef __aarch64__
100 		/* Allow calls from non-secure only */
101 		if (!is_caller_non_secure(flags))
102 			SMC_RET1(handle, STATE_SW_E_DENIED);
103 
104 		/*
105 		 * Pointers used in execution state switch are all 32 bits wide
106 		 */
107 		return (uintptr_t) arm_execution_state_switch(smc_fid,
108 				(uint32_t) x1, (uint32_t) x2, (uint32_t) x3,
109 				(uint32_t) x4, handle);
110 #else
111 		/* State switch denied */
112 		SMC_RET1(handle, STATE_SW_E_DENIED);
113 #endif /* __aarch64__ */
114 		}
115 
116 	case ARM_SIP_SVC_CALL_COUNT:
117 		/* PMF calls */
118 		call_count += PMF_NUM_SMC_CALLS;
119 
120 #if ETHOSN_NPU_DRIVER
121 		/* ETHOSN calls */
122 		call_count += ETHOSN_NUM_SMC_CALLS;
123 #endif          /* ETHOSN_NPU_DRIVER */
124 
125 		/* State switch call */
126 		call_count += 1;
127 
128 		SMC_RET1(handle, call_count);
129 
130 	case ARM_SIP_SVC_UID:
131 		/* Return UID to the caller */
132 		SMC_UUID_RET(handle, arm_sip_svc_uid);
133 
134 	case ARM_SIP_SVC_VERSION:
135 		/* Return the version of current implementation */
136 		SMC_RET2(handle, ARM_SIP_SVC_VERSION_MAJOR, ARM_SIP_SVC_VERSION_MINOR);
137 
138 	default:
139 #if ENABLE_SPMD_LP
140 		return plat_spmd_logical_sp_smc_handler(smc_fid, x1, x2, x3, x4,
141 				cookie, handle, flags);
142 #else
143 		WARN("Unimplemented ARM SiP Service Call: 0x%x \n", smc_fid);
144 		SMC_RET1(handle, SMC_UNK);
145 #endif
146 	}
147 
148 }
149 
150 
151 /* Define a runtime service descriptor for fast SMC calls */
152 DECLARE_RT_SVC(
153 	arm_sip_svc,
154 	OEN_SIP_START,
155 	OEN_SIP_END,
156 	SMC_TYPE_FAST,
157 	arm_sip_setup,
158 	arm_sip_handler
159 );
160