1f10796a0Sdp-arm /* 2*b10d4499SJeenu Viswambharan * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. 3f10796a0Sdp-arm * 4f10796a0Sdp-arm * Redistribution and use in source and binary forms, with or without 5f10796a0Sdp-arm * modification, are permitted provided that the following conditions are met: 6f10796a0Sdp-arm * 7f10796a0Sdp-arm * Redistributions of source code must retain the above copyright notice, this 8f10796a0Sdp-arm * list of conditions and the following disclaimer. 9f10796a0Sdp-arm * 10f10796a0Sdp-arm * Redistributions in binary form must reproduce the above copyright notice, 11f10796a0Sdp-arm * this list of conditions and the following disclaimer in the documentation 12f10796a0Sdp-arm * and/or other materials provided with the distribution. 13f10796a0Sdp-arm * 14f10796a0Sdp-arm * Neither the name of ARM nor the names of its contributors may be used 15f10796a0Sdp-arm * to endorse or promote products derived from this software without specific 16f10796a0Sdp-arm * prior written permission. 17f10796a0Sdp-arm * 18f10796a0Sdp-arm * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19f10796a0Sdp-arm * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20f10796a0Sdp-arm * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21f10796a0Sdp-arm * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22f10796a0Sdp-arm * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23f10796a0Sdp-arm * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24f10796a0Sdp-arm * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25f10796a0Sdp-arm * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26f10796a0Sdp-arm * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27f10796a0Sdp-arm * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28f10796a0Sdp-arm * POSSIBILITY OF SUCH DAMAGE. 29f10796a0Sdp-arm */ 30f10796a0Sdp-arm 31f10796a0Sdp-arm #include <arm_sip_svc.h> 32f10796a0Sdp-arm #include <debug.h> 33*b10d4499SJeenu Viswambharan #include <plat_arm.h> 34f10796a0Sdp-arm #include <pmf.h> 35f10796a0Sdp-arm #include <runtime_svc.h> 36f10796a0Sdp-arm #include <stdint.h> 37f10796a0Sdp-arm #include <uuid.h> 38f10796a0Sdp-arm 39f10796a0Sdp-arm 40f10796a0Sdp-arm /* ARM SiP Service UUID */ 41f10796a0Sdp-arm DEFINE_SVC_UUID(arm_sip_svc_uid, 42f10796a0Sdp-arm 0xe2756d55, 0x3360, 0x4bb5, 0xbf, 0xf3, 43f10796a0Sdp-arm 0x62, 0x79, 0xfd, 0x11, 0x37, 0xff); 44f10796a0Sdp-arm 45f10796a0Sdp-arm static int arm_sip_setup(void) 46f10796a0Sdp-arm { 47f10796a0Sdp-arm if (pmf_setup() != 0) 48f10796a0Sdp-arm return 1; 49f10796a0Sdp-arm return 0; 50f10796a0Sdp-arm } 51f10796a0Sdp-arm 52f10796a0Sdp-arm /* 53f10796a0Sdp-arm * This function handles ARM defined SiP Calls 54f10796a0Sdp-arm */ 55f10796a0Sdp-arm static uintptr_t arm_sip_handler(unsigned int smc_fid, 56f10796a0Sdp-arm u_register_t x1, 57f10796a0Sdp-arm u_register_t x2, 58f10796a0Sdp-arm u_register_t x3, 59f10796a0Sdp-arm u_register_t x4, 60f10796a0Sdp-arm void *cookie, 61f10796a0Sdp-arm void *handle, 62f10796a0Sdp-arm u_register_t flags) 63f10796a0Sdp-arm { 64*b10d4499SJeenu Viswambharan int call_count = 0; 65*b10d4499SJeenu Viswambharan 66f10796a0Sdp-arm /* 67f10796a0Sdp-arm * Dispatch PMF calls to PMF SMC handler and return its return 68f10796a0Sdp-arm * value 69f10796a0Sdp-arm */ 70f10796a0Sdp-arm if (is_pmf_fid(smc_fid)) { 71f10796a0Sdp-arm return pmf_smc_handler(smc_fid, x1, x2, x3, x4, cookie, 72f10796a0Sdp-arm handle, flags); 73f10796a0Sdp-arm } 74f10796a0Sdp-arm 75f10796a0Sdp-arm switch (smc_fid) { 76*b10d4499SJeenu Viswambharan case ARM_SIP_SVC_EXE_STATE_SWITCH: { 77*b10d4499SJeenu Viswambharan u_register_t pc; 78*b10d4499SJeenu Viswambharan 79*b10d4499SJeenu Viswambharan /* Allow calls from non-secure only */ 80*b10d4499SJeenu Viswambharan if (!is_caller_non_secure(flags)) 81*b10d4499SJeenu Viswambharan SMC_RET1(handle, STATE_SW_E_DENIED); 82*b10d4499SJeenu Viswambharan 83*b10d4499SJeenu Viswambharan /* Validate supplied entry point */ 84*b10d4499SJeenu Viswambharan pc = (u_register_t) ((x1 << 32) | (uint32_t) x2); 85*b10d4499SJeenu Viswambharan if (arm_validate_ns_entrypoint(pc)) 86*b10d4499SJeenu Viswambharan SMC_RET1(handle, STATE_SW_E_PARAM); 87*b10d4499SJeenu Viswambharan 88f10796a0Sdp-arm /* 89*b10d4499SJeenu Viswambharan * Pointers used in execution state switch are all 32 bits wide 90f10796a0Sdp-arm */ 91*b10d4499SJeenu Viswambharan return arm_execution_state_switch(smc_fid, (uint32_t) x1, 92*b10d4499SJeenu Viswambharan (uint32_t) x2, (uint32_t) x3, (uint32_t) x4, 93*b10d4499SJeenu Viswambharan handle); 94*b10d4499SJeenu Viswambharan } 95*b10d4499SJeenu Viswambharan 96*b10d4499SJeenu Viswambharan case ARM_SIP_SVC_CALL_COUNT: 97*b10d4499SJeenu Viswambharan /* PMF calls */ 98*b10d4499SJeenu Viswambharan call_count += PMF_NUM_SMC_CALLS; 99*b10d4499SJeenu Viswambharan 100*b10d4499SJeenu Viswambharan /* State switch call */ 101*b10d4499SJeenu Viswambharan call_count += 1; 102*b10d4499SJeenu Viswambharan 103*b10d4499SJeenu Viswambharan SMC_RET1(handle, call_count); 104f10796a0Sdp-arm 105f10796a0Sdp-arm case ARM_SIP_SVC_UID: 106f10796a0Sdp-arm /* Return UID to the caller */ 107f10796a0Sdp-arm SMC_UUID_RET(handle, arm_sip_svc_uid); 108f10796a0Sdp-arm 109f10796a0Sdp-arm case ARM_SIP_SVC_VERSION: 110f10796a0Sdp-arm /* Return the version of current implementation */ 111f10796a0Sdp-arm SMC_RET2(handle, ARM_SIP_SVC_VERSION_MAJOR, ARM_SIP_SVC_VERSION_MINOR); 112f10796a0Sdp-arm 113f10796a0Sdp-arm default: 114f10796a0Sdp-arm WARN("Unimplemented ARM SiP Service Call: 0x%x \n", smc_fid); 115f10796a0Sdp-arm SMC_RET1(handle, SMC_UNK); 116f10796a0Sdp-arm } 117f10796a0Sdp-arm 118f10796a0Sdp-arm } 119f10796a0Sdp-arm 120f10796a0Sdp-arm 121f10796a0Sdp-arm /* Define a runtime service descriptor for fast SMC calls */ 122f10796a0Sdp-arm DECLARE_RT_SVC( 123f10796a0Sdp-arm arm_sip_svc, 124f10796a0Sdp-arm OEN_SIP_START, 125f10796a0Sdp-arm OEN_SIP_END, 126f10796a0Sdp-arm SMC_TYPE_FAST, 127f10796a0Sdp-arm arm_sip_setup, 128f10796a0Sdp-arm arm_sip_handler 129f10796a0Sdp-arm ); 130