1# 2# Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9ifeq (${ARCH},aarch32) 10 ifeq (${AARCH32_SP},none) 11 $(error Variable AARCH32_SP has to be set for AArch32) 12 endif 13endif 14 15ifeq (${ARCH}, aarch64) 16 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 17 # DRAM (if available) or the TZC secured area of DRAM. 18 # TZC secured DRAM is the default. 19 20 ARM_TSP_RAM_LOCATION ?= dram 21 22 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 23 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 24 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 25 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 26 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 27 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 28 else 29 $(error Unsupported ARM_TSP_RAM_LOCATION value) 30 endif 31 32 # Process flags 33 # Process ARM_BL31_IN_DRAM flag 34 ARM_BL31_IN_DRAM := 0 35 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 36 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 37else 38 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 39endif 40 41$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 42 43 44# For the original power-state parameter format, the State-ID can be encoded 45# according to the recommended encoding or zero. This flag determines which 46# State-ID encoding to be parsed. 47ARM_RECOM_STATE_ID_ENC := 0 48 49# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 50# be set. Else throw a build error. 51ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 52 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 53 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 54 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 55 endif 56endif 57 58# Process ARM_RECOM_STATE_ID_ENC flag 59$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 60$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 61 62# Process ARM_DISABLE_TRUSTED_WDOG flag 63# By default, Trusted Watchdog is always enabled unless 64# SPIN_ON_BL1_EXIT or ENABLE_RME is set 65ARM_DISABLE_TRUSTED_WDOG := 0 66ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),) 67ARM_DISABLE_TRUSTED_WDOG := 1 68endif 69$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 70$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 71 72# Process ARM_CONFIG_CNTACR 73ARM_CONFIG_CNTACR := 1 74$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 75$(eval $(call add_define,ARM_CONFIG_CNTACR)) 76 77# Process ARM_BL31_IN_DRAM flag 78ARM_BL31_IN_DRAM := 0 79$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 80$(eval $(call add_define,ARM_BL31_IN_DRAM)) 81 82# As per CCA security model, all root firmware must execute from on-chip secure 83# memory. This means we must not run BL31 from TZC-protected DRAM. 84ifeq (${ARM_BL31_IN_DRAM},1) 85 ifeq (${ENABLE_RME},1) 86 $(error BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0) 87 endif 88endif 89 90# Process ARM_PLAT_MT flag 91ARM_PLAT_MT := 0 92$(eval $(call assert_boolean,ARM_PLAT_MT)) 93$(eval $(call add_define,ARM_PLAT_MT)) 94 95# Use translation tables library v2 by default 96ARM_XLAT_TABLES_LIB_V1 := 0 97$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 98$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 99 100# Don't have the Linux kernel as a BL33 image by default 101ARM_LINUX_KERNEL_AS_BL33 := 0 102$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 103$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 104 105ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) 106 ifneq (${ARCH},aarch64) 107 ifneq (${RESET_TO_SP_MIN},1) 108 $(error ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.) 109 endif 110 endif 111 ifndef PRELOADED_BL33_BASE 112 $(error PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.) 113 endif 114 ifeq (${RESET_TO_BL31},1) 115 ifndef ARM_PRELOADED_DTB_BASE 116 $(error ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used with RESET_TO_BL31.) 117 endif 118 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 119 endif 120endif 121 122# Use an implementation of SHA-256 with a smaller memory footprint but reduced 123# speed. 124$(eval $(call add_define,MBEDTLS_SHA256_SMALLER)) 125 126# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 127# in the FIP if the platform requires. 128ifneq ($(BL32_EXTRA1),) 129$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 130endif 131ifneq ($(BL32_EXTRA2),) 132$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 133endif 134 135# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 136ENABLE_PSCI_STAT := 1 137ENABLE_PMF := 1 138 139# Override the standard libc with optimised libc_asm 140OVERRIDE_LIBC := 1 141ifeq (${OVERRIDE_LIBC},1) 142 include lib/libc/libc_asm.mk 143endif 144 145# On ARM platforms, separate the code and read-only data sections to allow 146# mapping the former as executable and the latter as execute-never. 147SEPARATE_CODE_AND_RODATA := 1 148 149# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS 150# and NOBITS sections of BL31 image are adjacent to each other and loaded 151# into Trusted SRAM. 152SEPARATE_NOBITS_REGION := 0 153 154# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load 155# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate 156# the build to require that ARM_BL31_IN_DRAM is enabled as well. 157ifeq ($(SEPARATE_NOBITS_REGION),1) 158 ifneq ($(ARM_BL31_IN_DRAM),1) 159 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) 160 endif 161 ifneq ($(RECLAIM_INIT_CODE),0) 162 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) 163 endif 164endif 165 166# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case 167ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 168 ENABLE_PIE := 1 169endif 170 171# Disable GPT parser support, use FIP image by default 172ARM_GPT_SUPPORT := 0 173$(eval $(call assert_boolean,ARM_GPT_SUPPORT)) 174$(eval $(call add_define,ARM_GPT_SUPPORT)) 175 176# Include necessary sources to parse GPT image 177ifeq (${ARM_GPT_SUPPORT}, 1) 178 BL2_SOURCES += drivers/partition/gpt.c \ 179 drivers/partition/partition.c 180endif 181 182# Enable CRC instructions via extension for ARMv8-A CPUs. 183# For ARMv8.1-A, and onwards CRC instructions are default enabled. 184# Enable HW computed CRC support unconditionally in BL2 component. 185ifeq (${ARM_ARCH_MAJOR},8) 186 ifeq (${ARM_ARCH_MINOR},0) 187 BL2_CPPFLAGS += -march=armv8-a+crc 188 endif 189endif 190 191ifeq ($(PSA_FWU_SUPPORT),1) 192 # GPT support is recommended as per PSA FWU specification hence 193 # PSA FWU implementation is tightly coupled with GPT support, 194 # and it does not support other formats. 195 ifneq ($(ARM_GPT_SUPPORT),1) 196 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled) 197 endif 198 FWU_MK := drivers/fwu/fwu.mk 199 $(info Including ${FWU_MK}) 200 include ${FWU_MK} 201endif 202 203ifeq (${ARCH}, aarch64) 204PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 205endif 206 207PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 208 plat/arm/common/arm_common.c \ 209 plat/arm/common/arm_console.c 210 211ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 212PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 213 lib/xlat_tables/${ARCH}/xlat_tables.c 214else 215ifeq (${XLAT_MPU_LIB_V1}, 1) 216include lib/xlat_mpu/xlat_mpu.mk 217PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS} 218else 219include lib/xlat_tables_v2/xlat_tables.mk 220PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 221endif 222endif 223 224ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ 225 plat/arm/common/fconf/arm_fconf_io.c 226ifeq (${SPD},spmd) 227 ifeq (${BL2_ENABLE_SP_LOAD},1) 228 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c 229 endif 230endif 231 232BL1_SOURCES += drivers/io/io_fip.c \ 233 drivers/io/io_memmap.c \ 234 drivers/io/io_storage.c \ 235 plat/arm/common/arm_bl1_setup.c \ 236 plat/arm/common/arm_err.c \ 237 ${ARM_IO_SOURCES} 238 239ifdef EL3_PAYLOAD_BASE 240# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from 241# their holding pen 242BL1_SOURCES += plat/arm/common/arm_pm.c 243endif 244 245BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 246 drivers/delay_timer/generic_delay_timer.c \ 247 drivers/io/io_fip.c \ 248 drivers/io/io_memmap.c \ 249 drivers/io/io_storage.c \ 250 plat/arm/common/arm_bl2_setup.c \ 251 plat/arm/common/arm_err.c \ 252 common/tf_crc32.c \ 253 ${ARM_IO_SOURCES} 254 255# Firmware Configuration Framework sources 256include lib/fconf/fconf.mk 257 258BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 259BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 260 261# Add `libfdt` and Arm common helpers required for Dynamic Config 262include lib/libfdt/libfdt.mk 263 264DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 265 plat/arm/common/arm_dyn_cfg_helpers.c \ 266 common/uuid.c 267 268DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES} 269 270BL1_SOURCES += ${DYN_CFG_SOURCES} 271BL2_SOURCES += ${DYN_CFG_SOURCES} 272 273ifeq (${RESET_TO_BL2},1) 274BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c 275endif 276 277# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 278# the AArch32 descriptors. 279ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 280BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 281else 282ifneq (${PLAT}, corstone1000) 283BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 284endif 285endif 286BL2_SOURCES += plat/arm/common/arm_image_load.c \ 287 common/desc_image_load.c 288ifeq (${SPD},opteed) 289BL2_SOURCES += lib/optee/optee_utils.c 290endif 291 292BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 293 drivers/delay_timer/generic_delay_timer.c \ 294 plat/arm/common/arm_bl2u_setup.c 295 296BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 297 plat/arm/common/arm_pm.c \ 298 plat/arm/common/arm_topology.c \ 299 plat/common/plat_psci_common.c 300 301ifeq (${TRANSFER_LIST}, 1) 302 TRANSFER_LIST_SOURCES += plat/arm/common/arm_transfer_list.c 303endif 304 305ifneq ($(filter 1,${ENABLE_PMF} ${ETHOSN_NPU_DRIVER}),) 306ARM_SVC_HANDLER_SRCS := 307 308ifeq (${ENABLE_PMF},1) 309ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c 310endif 311 312ifeq (${ETHOSN_NPU_DRIVER},1) 313ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \ 314 drivers/delay_timer/delay_timer.c \ 315 drivers/arm/ethosn/ethosn_smc.c 316ifeq (${ETHOSN_NPU_TZMP1},1) 317ARM_SVC_HANDLER_SRCS += drivers/arm/ethosn/ethosn_big_fw.c 318endif 319endif 320 321ifeq (${ARCH}, aarch64) 322BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\ 323 plat/arm/common/arm_sip_svc.c \ 324 plat/arm/common/plat_arm_sip_svc.c \ 325 ${ARM_SVC_HANDLER_SRCS} 326else 327BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ 328 plat/arm/common/plat_arm_sip_svc.c \ 329 ${ARM_SVC_HANDLER_SRCS} 330endif 331endif 332 333ifeq (${EL3_EXCEPTION_HANDLING},1) 334BL31_SOURCES += plat/common/aarch64/plat_ehf.c 335endif 336 337ifeq (${SDEI_SUPPORT},1) 338BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 339ifeq (${SDEI_IN_FCONF},1) 340BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c 341endif 342endif 343 344# RAS sources 345ifeq (${ENABLE_FEAT_RAS}-${HANDLE_EA_EL3_FIRST_NS},1-1) 346BL31_SOURCES += lib/extensions/ras/std_err_record.c \ 347 lib/extensions/ras/ras_common.c 348endif 349 350# Pointer Authentication sources 351ifeq (${ENABLE_PAUTH}, 1) 352PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c 353endif 354 355ifeq (${SPD},spmd) 356BL31_SOURCES += plat/common/plat_spmd_manifest.c \ 357 common/uuid.c \ 358 ${LIBFDT_SRCS} 359 360BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 361endif 362 363ifeq (${DRTM_SUPPORT},1) 364BL31_SOURCES += plat/arm/common/arm_err.c 365endif 366 367ifneq (${TRUSTED_BOARD_BOOT},0) 368 369 # Include common TBB sources 370 AUTH_SOURCES := drivers/auth/auth_mod.c \ 371 drivers/auth/img_parser_mod.c 372 373 # Include the selected chain of trust sources. 374 ifeq (${COT},tbbr) 375 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 376 drivers/auth/tbbr/tbbr_cot_bl1.c 377 ifneq (${COT_DESC_IN_DTB},0) 378 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 379 else 380 # Juno has its own TBBR CoT file for BL2 381 ifeq (${PLAT},juno) 382 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c 383 endif 384 endif 385 else ifeq (${COT},dualroot) 386 BL1_SOURCES += drivers/auth/dualroot/bl1_cot.c 387 ifneq (${COT_DESC_IN_DTB},0) 388 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 389 endif 390 else ifeq (${COT},cca) 391 BL1_SOURCES += drivers/auth/cca/bl1_cot.c 392 ifneq (${COT_DESC_IN_DTB},0) 393 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 394 endif 395 else 396 $(error Unknown chain of trust ${COT}) 397 endif 398 399 ifeq (${COT_DESC_IN_DTB},0) 400 ifeq (${COT},dualroot) 401 COTDTPATH := fdts/dualroot_cot_descriptors.dtsi 402 else ifeq (${COT},cca) 403 COTDTPATH := fdts/cca_cot_descriptors.dtsi 404 else ifeq (${COT},tbbr) 405 ifneq (${PLAT},juno) 406 COTDTPATH := fdts/tbbr_cot_descriptors.dtsi 407 endif 408 endif 409 endif 410 411 BL1_SOURCES += ${AUTH_SOURCES} \ 412 bl1/tbbr/tbbr_img_desc.c \ 413 plat/arm/common/arm_bl1_fwu.c \ 414 plat/common/tbbr/plat_tbbr.c 415 416 BL2_SOURCES += ${AUTH_SOURCES} \ 417 plat/common/tbbr/plat_tbbr.c 418 419 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 420 421 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 422 423 $(info Including ${IMG_PARSER_LIB_MK}) 424 include ${IMG_PARSER_LIB_MK} 425endif 426 427# Include Measured Boot makefile before any Crypto library makefile. 428# Crypto library makefile may need default definitions of Measured Boot build 429# flags present in Measured Boot makefile. 430ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),) 431 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk 432 $(info Including ${MEASURED_BOOT_MK}) 433 include ${MEASURED_BOOT_MK} 434 435 ifeq (${MEASURED_BOOT},1) 436 BL1_SOURCES += ${EVENT_LOG_SOURCES} 437 BL2_SOURCES += ${EVENT_LOG_SOURCES} 438 endif 439 440 ifeq (${DRTM_SUPPORT},1) 441 BL31_SOURCES += ${EVENT_LOG_SOURCES} 442 endif 443endif 444 445ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),) 446 CRYPTO_SOURCES := drivers/auth/crypto_mod.c \ 447 lib/fconf/fconf_tbbr_getter.c 448 BL1_SOURCES += ${CRYPTO_SOURCES} 449 BL2_SOURCES += ${CRYPTO_SOURCES} 450 BL31_SOURCES += drivers/auth/crypto_mod.c 451 452 # We expect to locate the *.mk files under the directories specified below 453 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 454 455 $(info Including ${CRYPTO_LIB_MK}) 456 include ${CRYPTO_LIB_MK} 457endif 458 459ifeq (${RECLAIM_INIT_CODE}, 1) 460 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 461 $(error To reclaim init code xlat tables v2 must be used) 462 endif 463endif 464 465TRANSFER_LIST_BIN := ${BUILD_PLAT}/tl.bin 466 467.PHONY: tl 468tl: ${HW_CONFIG} 469 @echo " TLC ${TRANSFER_LIST_BIN}" 470 $(Q)${PYTHON} -m tools.tlc.tlc create --fdt ${HW_CONFIG} -s ${FW_HANDOFF_SIZE} ${TRANSFER_LIST_BIN} 471 $(Q)$(eval ARM_PRELOADED_DTB_OFFSET := `tlc info --fdt-offset ${TRANSFER_LIST_BIN}`) 472 473ifeq (${TRANSFER_LIST}, 1) 474 ifeq (${RESET_TO_BL31}, 1) 475 bl31: tl 476 endif 477endif 478 479ifneq ($(COTDTPATH),) 480 cot-dt-defines = IMAGE_BL2 $(BL2_DEFINES) $(PLAT_BL_COMMON_DEFINES) 481 cot-dt-include-dirs = $(BL2_INCLUDE_DIRS) $(PLAT_BL_COMMON_INCLUDE_DIRS) 482 483 cot-dt-cpp-flags = $(cot-dt-defines:%=-D%) 484 cot-dt-cpp-flags += $(cot-dt-include-dirs:%=-I%) 485 486 cot-dt-cpp-flags += $(BL2_CPPFLAGS) $(PLAT_BL_COMMON_CPPFLAGS) 487 cot-dt-cpp-flags += $(CPPFLAGS) $(BL_CPPFLAGS) $(TF_CFLAGS_$(ARCH)) 488 cot-dt-cpp-flags += -c -x assembler-with-cpp -E -P -o $@ $< 489 490 $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts): $(COTDTPATH) | $$(@D)/ 491 $(q)$($(ARCH)-cpp) $(cot-dt-cpp-flags) 492 493 $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c): $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts) | $$(@D)/ 494 $(q)poetry -q install 495 $(q)poetry run cot-dt2c convert-to-c $< $@ 496 497 BL2_SOURCES += $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c) 498endif 499