1# 2# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7ifeq (${ARCH}, aarch64) 8 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 9 # DRAM (if available) or the TZC secured area of DRAM. 10 # Trusted SRAM is the default. 11 12 ARM_TSP_RAM_LOCATION := tsram 13 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 14 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 15 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 16 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 17 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 18 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 19 else 20 $(error "Unsupported ARM_TSP_RAM_LOCATION value") 21 endif 22 23 # Process flags 24 # Process ARM_BL31_IN_DRAM flag 25 ARM_BL31_IN_DRAM := 0 26 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 27 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 28else 29 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 30endif 31 32$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 33 34 35# For the original power-state parameter format, the State-ID can be encoded 36# according to the recommended encoding or zero. This flag determines which 37# State-ID encoding to be parsed. 38ARM_RECOM_STATE_ID_ENC := 0 39 40# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 41# be set. Else throw a build error. 42ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 43 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 44 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 45 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 46 endif 47endif 48 49# Process ARM_RECOM_STATE_ID_ENC flag 50$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 51$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 52 53# Process ARM_DISABLE_TRUSTED_WDOG flag 54# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set 55ARM_DISABLE_TRUSTED_WDOG := 0 56ifeq (${SPIN_ON_BL1_EXIT}, 1) 57ARM_DISABLE_TRUSTED_WDOG := 1 58endif 59$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 60$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 61 62# Process ARM_CONFIG_CNTACR 63ARM_CONFIG_CNTACR := 1 64$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 65$(eval $(call add_define,ARM_CONFIG_CNTACR)) 66 67# Process ARM_BL31_IN_DRAM flag 68ARM_BL31_IN_DRAM := 0 69$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 70$(eval $(call add_define,ARM_BL31_IN_DRAM)) 71 72# Process ARM_PLAT_MT flag 73ARM_PLAT_MT := 0 74$(eval $(call assert_boolean,ARM_PLAT_MT)) 75$(eval $(call add_define,ARM_PLAT_MT)) 76 77# Use translation tables library v2 by default 78ARM_XLAT_TABLES_LIB_V1 := 0 79$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 80$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 81 82# Use an implementation of SHA-256 with a smaller memory footprint but reduced 83# speed. 84$(eval $(call add_define,MBEDTLS_SHA256_SMALLER)) 85 86# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 87# in the FIP if the platform requires. 88ifneq ($(BL32_EXTRA1),) 89$(eval $(call FIP_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1)) 90endif 91ifneq ($(BL32_EXTRA2),) 92$(eval $(call FIP_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2)) 93endif 94 95# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 96ENABLE_PSCI_STAT := 1 97ENABLE_PMF := 1 98 99# On ARM platforms, separate the code and read-only data sections to allow 100# mapping the former as executable and the latter as execute-never. 101SEPARATE_CODE_AND_RODATA := 1 102 103# Enable new version of image loading on ARM platforms 104LOAD_IMAGE_V2 := 1 105 106# Use generic OID definition (tbbr_oid.h) 107USE_TBBR_DEFS := 1 108 109# Disable ARM Cryptocell by default 110ARM_CRYPTOCELL_INTEG := 0 111$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG)) 112$(eval $(call add_define,ARM_CRYPTOCELL_INTEG)) 113 114PLAT_INCLUDES += -Iinclude/common/tbbr \ 115 -Iinclude/plat/arm/common 116 117ifeq (${ARCH}, aarch64) 118PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 119endif 120 121PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 122 plat/arm/common/arm_common.c 123 124ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 125PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 126 lib/xlat_tables/${ARCH}/xlat_tables.c 127else 128include lib/xlat_tables_v2/xlat_tables.mk 129 130PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 131endif 132 133BL1_SOURCES += drivers/arm/sp805/sp805.c \ 134 drivers/io/io_fip.c \ 135 drivers/io/io_memmap.c \ 136 drivers/io/io_storage.c \ 137 plat/arm/common/arm_bl1_setup.c \ 138 plat/arm/common/arm_io_storage.c 139ifdef EL3_PAYLOAD_BASE 140# Need the arm_program_trusted_mailbox() function to release secondary CPUs from 141# their holding pen 142BL1_SOURCES += plat/arm/common/arm_pm.c 143endif 144 145BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 146 drivers/delay_timer/generic_delay_timer.c \ 147 drivers/io/io_fip.c \ 148 drivers/io/io_memmap.c \ 149 drivers/io/io_storage.c \ 150 plat/arm/common/arm_bl2_setup.c \ 151 plat/arm/common/arm_io_storage.c 152ifeq (${LOAD_IMAGE_V2},1) 153# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 154# the AArch32 descriptors. 155ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 156BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 157else 158BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 159endif 160BL2_SOURCES += plat/arm/common/arm_image_load.c \ 161 common/desc_image_load.c 162ifeq (${SPD},opteed) 163BL2_SOURCES += lib/optee/optee_utils.c 164endif 165endif 166 167BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 168 drivers/delay_timer/generic_delay_timer.c \ 169 plat/arm/common/arm_bl2u_setup.c 170 171BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 172 plat/arm/common/arm_pm.c \ 173 plat/arm/common/arm_topology.c \ 174 plat/arm/common/execution_state_switch.c \ 175 plat/common/plat_psci_common.c 176 177ifeq (${ENABLE_PMF}, 1) 178BL31_SOURCES += plat/arm/common/arm_sip_svc.c \ 179 lib/pmf/pmf_smc.c 180endif 181 182ifneq (${TRUSTED_BOARD_BOOT},0) 183 184 # Include common TBB sources 185 AUTH_SOURCES := drivers/auth/auth_mod.c \ 186 drivers/auth/crypto_mod.c \ 187 drivers/auth/img_parser_mod.c \ 188 drivers/auth/tbbr/tbbr_cot.c \ 189 190 PLAT_INCLUDES += -Iinclude/bl1/tbbr 191 192 BL1_SOURCES += ${AUTH_SOURCES} \ 193 bl1/tbbr/tbbr_img_desc.c \ 194 plat/arm/common/arm_bl1_fwu.c \ 195 plat/common/tbbr/plat_tbbr.c 196 197 BL2_SOURCES += ${AUTH_SOURCES} \ 198 plat/common/tbbr/plat_tbbr.c 199 200 $(eval $(call FWU_FIP_ADD_IMG,NS_BL2U,--fwu)) 201 202 # We expect to locate the *.mk files under the directories specified below 203ifeq (${ARM_CRYPTOCELL_INTEG},0) 204 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 205else 206 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk 207endif 208 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 209 210 $(info Including ${CRYPTO_LIB_MK}) 211 include ${CRYPTO_LIB_MK} 212 213 $(info Including ${IMG_PARSER_LIB_MK}) 214 include ${IMG_PARSER_LIB_MK} 215 216endif 217