1# 2# Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9ifeq (${ARCH},aarch32) 10 ifeq (${AARCH32_SP},none) 11 $(error Variable AARCH32_SP has to be set for AArch32) 12 endif 13endif 14 15ifeq (${ARCH}, aarch64) 16 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 17 # DRAM (if available) or the TZC secured area of DRAM. 18 # TZC secured DRAM is the default. 19 20 ARM_TSP_RAM_LOCATION ?= dram 21 22 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 23 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 24 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 25 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 26 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 27 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 28 else 29 $(error Unsupported ARM_TSP_RAM_LOCATION value) 30 endif 31 32 # Process flags 33 # Process ARM_BL31_IN_DRAM flag 34 ARM_BL31_IN_DRAM := 0 35 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 36 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 37else 38 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 39endif 40 41$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 42 43 44# For the original power-state parameter format, the State-ID can be encoded 45# according to the recommended encoding or zero. This flag determines which 46# State-ID encoding to be parsed. 47ARM_RECOM_STATE_ID_ENC := 0 48 49# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 50# be set. Else throw a build error. 51ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 52 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 53 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 54 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 55 endif 56endif 57 58# Process ARM_RECOM_STATE_ID_ENC flag 59$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 60$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 61 62# Process ARM_DISABLE_TRUSTED_WDOG flag 63# By default, Trusted Watchdog is always enabled unless 64# SPIN_ON_BL1_EXIT or ENABLE_RME is set 65ARM_DISABLE_TRUSTED_WDOG := 0 66ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),) 67ARM_DISABLE_TRUSTED_WDOG := 1 68endif 69$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 70$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 71 72# Process ARM_CONFIG_CNTACR 73ARM_CONFIG_CNTACR := 1 74$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 75$(eval $(call add_define,ARM_CONFIG_CNTACR)) 76 77# Process ARM_BL31_IN_DRAM flag 78ARM_BL31_IN_DRAM := 0 79$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 80$(eval $(call add_define,ARM_BL31_IN_DRAM)) 81 82# As per CCA security model, all root firmware must execute from on-chip secure 83# memory. This means we must not run BL31 from TZC-protected DRAM. 84ifeq (${ARM_BL31_IN_DRAM},1) 85 ifeq (${ENABLE_RME},1) 86 $(error BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0) 87 endif 88endif 89 90# Process ARM_PLAT_MT flag 91ARM_PLAT_MT := 0 92$(eval $(call assert_boolean,ARM_PLAT_MT)) 93$(eval $(call add_define,ARM_PLAT_MT)) 94 95# Use translation tables library v2 by default 96ARM_XLAT_TABLES_LIB_V1 := 0 97$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 98$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 99 100# Don't have the Linux kernel as a BL33 image by default 101ARM_LINUX_KERNEL_AS_BL33 := 0 102$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 103$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 104 105ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) 106 ifneq (${ARCH},aarch64) 107 ifneq (${RESET_TO_SP_MIN},1) 108 $(error ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.) 109 endif 110 endif 111 ifndef PRELOADED_BL33_BASE 112 $(error PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.) 113 endif 114 ifeq (${RESET_TO_BL31},1) 115 ifndef ARM_PRELOADED_DTB_BASE 116 $(error ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used with RESET_TO_BL31.) 117 endif 118 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 119 endif 120endif 121 122# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 123# in the FIP if the platform requires. 124ifneq ($(BL32_EXTRA1),) 125$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 126endif 127ifneq ($(BL32_EXTRA2),) 128$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 129endif 130 131# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 132ENABLE_PSCI_STAT := 1 133ENABLE_PMF := 1 134 135# Override the standard libc with optimised libc_asm 136OVERRIDE_LIBC := 1 137ifeq (${OVERRIDE_LIBC},1) 138 include lib/libc/libc_asm.mk 139endif 140 141# On ARM platforms, separate the code and read-only data sections to allow 142# mapping the former as executable and the latter as execute-never. 143SEPARATE_CODE_AND_RODATA := 1 144 145# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS 146# and NOBITS sections of BL31 image are adjacent to each other and loaded 147# into Trusted SRAM. 148SEPARATE_NOBITS_REGION := 0 149 150# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load 151# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate 152# the build to require that ARM_BL31_IN_DRAM is enabled as well. 153ifeq ($(SEPARATE_NOBITS_REGION),1) 154 ifneq ($(ARM_BL31_IN_DRAM),1) 155 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) 156 endif 157 ifneq ($(RECLAIM_INIT_CODE),0) 158 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) 159 endif 160endif 161 162# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case 163ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 164 ENABLE_PIE := 1 165endif 166 167# Disable GPT parser support, use FIP image by default 168ARM_GPT_SUPPORT := 0 169$(eval $(call assert_boolean,ARM_GPT_SUPPORT)) 170$(eval $(call add_define,ARM_GPT_SUPPORT)) 171 172# Include necessary sources to parse GPT image 173ifeq (${ARM_GPT_SUPPORT}, 1) 174 BL2_SOURCES += drivers/partition/gpt.c \ 175 drivers/partition/partition.c 176endif 177 178# Enable CRC instructions via extension for ARMv8-A CPUs. 179# For ARMv8.1-A, and onwards CRC instructions are default enabled. 180# Enable HW computed CRC support unconditionally in BL2 component. 181ifeq (${ARM_ARCH_MAJOR},8) 182 ifeq (${ARM_ARCH_MINOR},0) 183 BL2_CPPFLAGS += -march=armv8-a+crc 184 endif 185endif 186 187ifeq ($(PSA_FWU_SUPPORT),1) 188 # GPT support is recommended as per PSA FWU specification hence 189 # PSA FWU implementation is tightly coupled with GPT support, 190 # and it does not support other formats. 191 ifneq ($(ARM_GPT_SUPPORT),1) 192 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled) 193 endif 194 FWU_MK := drivers/fwu/fwu.mk 195 $(info Including ${FWU_MK}) 196 include ${FWU_MK} 197endif 198 199ifeq (${ARCH}, aarch64) 200PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 201endif 202 203PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 204 plat/arm/common/arm_common.c \ 205 plat/arm/common/arm_console.c 206 207ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 208PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 209 lib/xlat_tables/${ARCH}/xlat_tables.c 210else 211ifeq (${XLAT_MPU_LIB_V1}, 1) 212include lib/xlat_mpu/xlat_mpu.mk 213PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS} 214else 215include lib/xlat_tables_v2/xlat_tables.mk 216PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 217endif 218endif 219 220ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ 221 plat/arm/common/fconf/arm_fconf_io.c 222ifeq (${SPD},spmd) 223 ifeq (${BL2_ENABLE_SP_LOAD},1) 224 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c 225 endif 226endif 227 228BL1_SOURCES += drivers/io/io_fip.c \ 229 drivers/io/io_memmap.c \ 230 drivers/io/io_storage.c \ 231 plat/arm/common/arm_bl1_setup.c \ 232 plat/arm/common/arm_err.c \ 233 ${ARM_IO_SOURCES} 234 235ifdef EL3_PAYLOAD_BASE 236# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from 237# their holding pen 238BL1_SOURCES += plat/arm/common/arm_pm.c 239endif 240 241BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 242 drivers/delay_timer/generic_delay_timer.c \ 243 drivers/io/io_fip.c \ 244 drivers/io/io_memmap.c \ 245 drivers/io/io_storage.c \ 246 plat/arm/common/arm_bl2_setup.c \ 247 plat/arm/common/arm_err.c \ 248 common/tf_crc32.c \ 249 ${ARM_IO_SOURCES} 250 251# Firmware Configuration Framework sources 252include lib/fconf/fconf.mk 253 254BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 255BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 256 257# Add `libfdt` and Arm common helpers required for Dynamic Config 258include lib/libfdt/libfdt.mk 259 260DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 261 plat/arm/common/arm_dyn_cfg_helpers.c \ 262 common/uuid.c 263 264DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES} 265 266BL1_SOURCES += ${DYN_CFG_SOURCES} 267BL2_SOURCES += ${DYN_CFG_SOURCES} 268 269ifeq (${RESET_TO_BL2},1) 270BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c 271endif 272 273# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 274# the AArch32 descriptors. 275ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 276BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 277else 278ifneq (${PLAT}, corstone1000) 279BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 280endif 281endif 282BL2_SOURCES += plat/arm/common/arm_image_load.c \ 283 common/desc_image_load.c 284ifeq (${SPD},opteed) 285BL2_SOURCES += lib/optee/optee_utils.c 286endif 287 288BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 289 drivers/delay_timer/generic_delay_timer.c \ 290 plat/arm/common/arm_bl2u_setup.c 291 292BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 293 plat/arm/common/arm_pm.c \ 294 plat/arm/common/arm_topology.c \ 295 plat/common/plat_psci_common.c 296 297ifeq (${TRANSFER_LIST}, 1) 298 TRANSFER_LIST_SOURCES += plat/arm/common/arm_transfer_list.c 299endif 300 301ifneq ($(filter 1,${ENABLE_PMF} ${ETHOSN_NPU_DRIVER}),) 302ARM_SVC_HANDLER_SRCS := 303 304ifeq (${ENABLE_PMF},1) 305ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c 306endif 307 308ifeq (${ETHOSN_NPU_DRIVER},1) 309ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \ 310 drivers/delay_timer/delay_timer.c \ 311 drivers/arm/ethosn/ethosn_smc.c 312ifeq (${ETHOSN_NPU_TZMP1},1) 313ARM_SVC_HANDLER_SRCS += drivers/arm/ethosn/ethosn_big_fw.c 314endif 315endif 316 317ifeq (${ARCH}, aarch64) 318BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\ 319 plat/arm/common/arm_sip_svc.c \ 320 plat/arm/common/plat_arm_sip_svc.c \ 321 ${ARM_SVC_HANDLER_SRCS} 322else 323BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ 324 plat/arm/common/plat_arm_sip_svc.c \ 325 ${ARM_SVC_HANDLER_SRCS} 326endif 327endif 328 329ifeq (${EL3_EXCEPTION_HANDLING},1) 330BL31_SOURCES += plat/common/aarch64/plat_ehf.c 331endif 332 333ifeq (${SDEI_SUPPORT},1) 334BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 335ifeq (${SDEI_IN_FCONF},1) 336BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c 337endif 338endif 339 340# RAS sources 341ifeq (${ENABLE_FEAT_RAS}-${HANDLE_EA_EL3_FIRST_NS},1-1) 342BL31_SOURCES += lib/extensions/ras/std_err_record.c \ 343 lib/extensions/ras/ras_common.c 344endif 345 346# Pointer Authentication sources 347ifeq (${ENABLE_PAUTH}, 1) 348PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c 349endif 350 351ifeq (${SPD},spmd) 352BL31_SOURCES += plat/common/plat_spmd_manifest.c \ 353 common/uuid.c \ 354 ${LIBFDT_SRCS} 355 356BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 357endif 358 359ifeq (${DRTM_SUPPORT},1) 360BL31_SOURCES += plat/arm/common/arm_err.c 361endif 362 363ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),) 364 PLAT_INCLUDES += -Iplat/arm/common \ 365 -Iinclude/drivers/auth/mbedtls 366 # Specify mbed TLS configuration file 367 ifeq (${PSA_CRYPTO},1) 368 MBEDTLS_CONFIG_FILE ?= "<plat_arm_psa_mbedtls_config.h>" 369 else 370 MBEDTLS_CONFIG_FILE ?= "<plat_arm_mbedtls_config.h>" 371 endif 372endif 373 374ifneq (${TRUSTED_BOARD_BOOT},0) 375 376 # Include common TBB sources 377 AUTH_SOURCES := drivers/auth/auth_mod.c \ 378 drivers/auth/img_parser_mod.c 379 380 # Include the selected chain of trust sources. 381 ifeq (${COT},tbbr) 382 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 383 drivers/auth/tbbr/tbbr_cot_bl1.c 384 ifneq (${COT_DESC_IN_DTB},0) 385 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 386 else 387 # Juno has its own TBBR CoT file for BL2 388 ifeq (${PLAT},juno) 389 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c 390 endif 391 endif 392 else ifeq (${COT},dualroot) 393 BL1_SOURCES += drivers/auth/dualroot/bl1_cot.c 394 ifneq (${COT_DESC_IN_DTB},0) 395 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 396 endif 397 else ifeq (${COT},cca) 398 BL1_SOURCES += drivers/auth/cca/bl1_cot.c 399 ifneq (${COT_DESC_IN_DTB},0) 400 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 401 endif 402 else 403 $(error Unknown chain of trust ${COT}) 404 endif 405 406 ifeq (${COT_DESC_IN_DTB},0) 407 ifeq (${COT},dualroot) 408 COTDTPATH := fdts/dualroot_cot_descriptors.dtsi 409 else ifeq (${COT},cca) 410 COTDTPATH := fdts/cca_cot_descriptors.dtsi 411 else ifeq (${COT},tbbr) 412 ifneq (${PLAT},juno) 413 COTDTPATH := fdts/tbbr_cot_descriptors.dtsi 414 endif 415 endif 416 endif 417 418 BL1_SOURCES += ${AUTH_SOURCES} \ 419 bl1/tbbr/tbbr_img_desc.c \ 420 plat/arm/common/arm_bl1_fwu.c \ 421 plat/common/tbbr/plat_tbbr.c 422 423 BL2_SOURCES += ${AUTH_SOURCES} \ 424 plat/common/tbbr/plat_tbbr.c 425 426 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 427 428 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 429 430 $(info Including ${IMG_PARSER_LIB_MK}) 431 include ${IMG_PARSER_LIB_MK} 432endif 433 434# Include Measured Boot makefile before any Crypto library makefile. 435# Crypto library makefile may need default definitions of Measured Boot build 436# flags present in Measured Boot makefile. 437ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),) 438 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk 439 $(info Including ${MEASURED_BOOT_MK}) 440 include ${MEASURED_BOOT_MK} 441 442 ifeq (${MEASURED_BOOT},1) 443 BL1_SOURCES += ${EVENT_LOG_SOURCES} 444 BL2_SOURCES += ${EVENT_LOG_SOURCES} 445 endif 446 447 ifeq (${DRTM_SUPPORT},1) 448 BL31_SOURCES += ${EVENT_LOG_SOURCES} 449 endif 450endif 451 452ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),) 453 CRYPTO_SOURCES := drivers/auth/crypto_mod.c \ 454 lib/fconf/fconf_tbbr_getter.c 455 BL1_SOURCES += ${CRYPTO_SOURCES} 456 BL2_SOURCES += ${CRYPTO_SOURCES} 457 BL31_SOURCES += drivers/auth/crypto_mod.c 458 459 # We expect to locate the *.mk files under the directories specified below 460 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 461 462 $(info Including ${CRYPTO_LIB_MK}) 463 include ${CRYPTO_LIB_MK} 464endif 465 466ifeq (${RECLAIM_INIT_CODE}, 1) 467 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 468 $(error To reclaim init code xlat tables v2 must be used) 469 endif 470endif 471 472ifneq ($(COTDTPATH),) 473 cot-dt-defines = IMAGE_BL2 $(BL2_DEFINES) $(PLAT_BL_COMMON_DEFINES) 474 cot-dt-include-dirs = $(BL2_INCLUDE_DIRS) $(PLAT_BL_COMMON_INCLUDE_DIRS) 475 476 cot-dt-cpp-flags = $(cot-dt-defines:%=-D%) 477 cot-dt-cpp-flags += $(cot-dt-include-dirs:%=-I%) 478 479 cot-dt-cpp-flags += $(BL2_CPPFLAGS) $(PLAT_BL_COMMON_CPPFLAGS) 480 cot-dt-cpp-flags += $(CPPFLAGS) $(BL_CPPFLAGS) $(TF_CFLAGS_$(ARCH)) 481 cot-dt-cpp-flags += -c -x assembler-with-cpp -E -P -o $@ $< 482 483 $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts): $(COTDTPATH) | $$(@D)/ 484 $(q)$($(ARCH)-cpp) $(cot-dt-cpp-flags) 485 486 $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c): $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts) | $$(@D)/ 487 $(if $(host-poetry),$(q)poetry -q install) 488 $(q)$(if $(host-poetry),poetry run )cot-dt2c convert-to-c $< $@ 489 490 BL2_SOURCES += $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c) 491endif 492