1# 2# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7ifeq (${ARCH}, aarch64) 8 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 9 # DRAM (if available) or the TZC secured area of DRAM. 10 # Trusted SRAM is the default. 11 12 ifneq (${TRUSTED_BOARD_BOOT},0) 13 ARM_TSP_RAM_LOCATION ?= dram 14 else 15 ARM_TSP_RAM_LOCATION ?= tsram 16 endif 17 18 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 19 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 20 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 21 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 22 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 23 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 24 else 25 $(error "Unsupported ARM_TSP_RAM_LOCATION value") 26 endif 27 28 # Process flags 29 $(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 30 31 # Process ARM_BL31_IN_DRAM flag 32 ARM_BL31_IN_DRAM := 0 33 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 34 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 35endif 36 37# For the original power-state parameter format, the State-ID can be encoded 38# according to the recommended encoding or zero. This flag determines which 39# State-ID encoding to be parsed. 40ARM_RECOM_STATE_ID_ENC := 0 41 42# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 43# be set. Else throw a build error. 44ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 45 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 46 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 47 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 48 endif 49endif 50 51# Process ARM_RECOM_STATE_ID_ENC flag 52$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 53$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 54 55# Process ARM_DISABLE_TRUSTED_WDOG flag 56# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set 57ARM_DISABLE_TRUSTED_WDOG := 0 58ifeq (${SPIN_ON_BL1_EXIT}, 1) 59ARM_DISABLE_TRUSTED_WDOG := 1 60endif 61$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 62$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 63 64# Process ARM_CONFIG_CNTACR 65ARM_CONFIG_CNTACR := 1 66$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 67$(eval $(call add_define,ARM_CONFIG_CNTACR)) 68 69# Process ARM_BL31_IN_DRAM flag 70ARM_BL31_IN_DRAM := 0 71$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 72$(eval $(call add_define,ARM_BL31_IN_DRAM)) 73 74# Process ARM_PLAT_MT flag 75ARM_PLAT_MT := 0 76$(eval $(call assert_boolean,ARM_PLAT_MT)) 77$(eval $(call add_define,ARM_PLAT_MT)) 78 79# Use translation tables library v2 by default 80ARM_XLAT_TABLES_LIB_V1 := 0 81$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 82$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 83 84# Use an implementation of SHA-256 with a smaller memory footprint but reduced 85# speed. 86$(eval $(call add_define,MBEDTLS_SHA256_SMALLER)) 87 88# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 89# in the FIP if the platform requires. 90ifneq ($(BL32_EXTRA1),) 91$(eval $(call FIP_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1)) 92endif 93ifneq ($(BL32_EXTRA2),) 94$(eval $(call FIP_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2)) 95endif 96 97# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 98ENABLE_PSCI_STAT := 1 99ENABLE_PMF := 1 100 101# On ARM platforms, separate the code and read-only data sections to allow 102# mapping the former as executable and the latter as execute-never. 103SEPARATE_CODE_AND_RODATA := 1 104 105# Enable new version of image loading on ARM platforms 106LOAD_IMAGE_V2 := 1 107 108# Use generic OID definition (tbbr_oid.h) 109USE_TBBR_DEFS := 1 110 111# Disable ARM Cryptocell by default 112ARM_CRYPTOCELL_INTEG := 0 113$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG)) 114$(eval $(call add_define,ARM_CRYPTOCELL_INTEG)) 115 116PLAT_INCLUDES += -Iinclude/common/tbbr \ 117 -Iinclude/plat/arm/common 118 119ifeq (${ARCH}, aarch64) 120PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 121endif 122 123PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 124 plat/arm/common/arm_common.c 125 126ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 127PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 128 lib/xlat_tables/${ARCH}/xlat_tables.c 129else 130include lib/xlat_tables_v2/xlat_tables.mk 131 132PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 133endif 134 135BL1_SOURCES += drivers/arm/sp805/sp805.c \ 136 drivers/io/io_fip.c \ 137 drivers/io/io_memmap.c \ 138 drivers/io/io_storage.c \ 139 plat/arm/common/arm_bl1_setup.c \ 140 plat/arm/common/arm_io_storage.c 141ifdef EL3_PAYLOAD_BASE 142# Need the arm_program_trusted_mailbox() function to release secondary CPUs from 143# their holding pen 144BL1_SOURCES += plat/arm/common/arm_pm.c 145endif 146 147BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 148 drivers/delay_timer/generic_delay_timer.c \ 149 drivers/io/io_fip.c \ 150 drivers/io/io_memmap.c \ 151 drivers/io/io_storage.c \ 152 plat/arm/common/arm_bl2_setup.c \ 153 plat/arm/common/arm_io_storage.c 154ifeq (${LOAD_IMAGE_V2},1) 155# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 156# the AArch32 descriptors. 157ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 158BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 159else 160BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 161endif 162BL2_SOURCES += plat/arm/common/arm_image_load.c \ 163 common/desc_image_load.c 164ifeq (${SPD},opteed) 165BL2_SOURCES += lib/optee/optee_utils.c 166endif 167endif 168 169BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 170 drivers/delay_timer/generic_delay_timer.c \ 171 plat/arm/common/arm_bl2u_setup.c 172 173BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 174 plat/arm/common/arm_pm.c \ 175 plat/arm/common/arm_topology.c \ 176 plat/arm/common/execution_state_switch.c \ 177 plat/common/plat_psci_common.c 178 179ifeq (${ENABLE_PMF}, 1) 180BL31_SOURCES += plat/arm/common/arm_sip_svc.c \ 181 lib/pmf/pmf_smc.c 182endif 183 184ifneq (${TRUSTED_BOARD_BOOT},0) 185 186 # Include common TBB sources 187 AUTH_SOURCES := drivers/auth/auth_mod.c \ 188 drivers/auth/crypto_mod.c \ 189 drivers/auth/img_parser_mod.c \ 190 drivers/auth/tbbr/tbbr_cot.c \ 191 192 PLAT_INCLUDES += -Iinclude/bl1/tbbr 193 194 BL1_SOURCES += ${AUTH_SOURCES} \ 195 bl1/tbbr/tbbr_img_desc.c \ 196 plat/arm/common/arm_bl1_fwu.c \ 197 plat/common/tbbr/plat_tbbr.c 198 199 BL2_SOURCES += ${AUTH_SOURCES} \ 200 plat/common/tbbr/plat_tbbr.c 201 202 $(eval $(call FWU_FIP_ADD_IMG,NS_BL2U,--fwu)) 203 204 # We expect to locate the *.mk files under the directories specified below 205ifeq (${ARM_CRYPTOCELL_INTEG},0) 206 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 207else 208 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk 209endif 210 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 211 212 $(info Including ${CRYPTO_LIB_MK}) 213 include ${CRYPTO_LIB_MK} 214 215 $(info Including ${IMG_PARSER_LIB_MK}) 216 include ${IMG_PARSER_LIB_MK} 217 218endif 219