1# 2# Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9ifeq (${ARCH},aarch32) 10 ifeq (${AARCH32_SP},none) 11 $(error Variable AARCH32_SP has to be set for AArch32) 12 endif 13endif 14 15ifeq (${ARCH}, aarch64) 16 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 17 # DRAM (if available) or the TZC secured area of DRAM. 18 # TZC secured DRAM is the default. 19 20 ARM_TSP_RAM_LOCATION ?= dram 21 22 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 23 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 24 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 25 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 26 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 27 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 28 else 29 $(error Unsupported ARM_TSP_RAM_LOCATION value) 30 endif 31 32 # Process flags 33 # Process ARM_BL31_IN_DRAM flag 34 ARM_BL31_IN_DRAM := 0 35 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 36 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 37else 38 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 39endif 40 41$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 42 43 44# For the original power-state parameter format, the State-ID can be encoded 45# according to the recommended encoding or zero. This flag determines which 46# State-ID encoding to be parsed. 47ARM_RECOM_STATE_ID_ENC := 0 48 49# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 50# be set. Else throw a build error. 51ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 52 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 53 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 54 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 55 endif 56endif 57 58# Process ARM_RECOM_STATE_ID_ENC flag 59$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 60$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 61 62# Process ARM_DISABLE_TRUSTED_WDOG flag 63# By default, Trusted Watchdog is always enabled unless 64# SPIN_ON_BL1_EXIT or ENABLE_RME is set 65ARM_DISABLE_TRUSTED_WDOG := 0 66ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),) 67ARM_DISABLE_TRUSTED_WDOG := 1 68endif 69$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 70$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 71 72# Process ARM_CONFIG_CNTACR 73ARM_CONFIG_CNTACR := 1 74$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 75$(eval $(call add_define,ARM_CONFIG_CNTACR)) 76 77# Process ARM_BL31_IN_DRAM flag 78ARM_BL31_IN_DRAM := 0 79$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 80$(eval $(call add_define,ARM_BL31_IN_DRAM)) 81 82# Macro to enable ACS SMC handler 83PLAT_ARM_ACS_SMC_HANDLER := 0 84ifeq (${ENABLE_ACS_SMC}, 1) 85PLAT_ARM_ACS_SMC_HANDLER := 1 86endif 87 88# Build macro necessary for branching to ACS tests 89$(eval $(call add_define,PLAT_ARM_ACS_SMC_HANDLER)) 90 91# As per CCA security model, all root firmware must execute from on-chip secure 92# memory. This means we must not run BL31 from TZC-protected DRAM. 93ifeq (${ARM_BL31_IN_DRAM},1) 94 ifeq (${ENABLE_RME},1) 95 $(error BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0) 96 endif 97endif 98 99# Process ARM_PLAT_MT flag 100ARM_PLAT_MT := 0 101$(eval $(call assert_boolean,ARM_PLAT_MT)) 102$(eval $(call add_define,ARM_PLAT_MT)) 103 104# Use translation tables library v2 by default 105ARM_XLAT_TABLES_LIB_V1 := 0 106$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 107$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 108 109# Don't have the Linux kernel as a BL33 image by default 110ARM_LINUX_KERNEL_AS_BL33 := 0 111$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 112$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 113 114ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) 115 USE_KERNEL_DT_CONVENTION := 1 116 117 ifneq (${ARCH},aarch64) 118 ifneq (${RESET_TO_SP_MIN},1) 119 $(error ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.) 120 endif 121 endif 122 ifndef HW_CONFIG_BASE 123 ifndef ARM_PRELOADED_DTB_BASE 124 $(error If ARM_LINUX_KERNEL_AS_BL33 is used, either HW_CONFIG_BASE or \ 125 ARM_PRELOADED_DTB_BASE must be set. ) 126 endif 127 128 HW_CONFIG_BASE := ${ARM_PRELOADED_DTB_BASE} 129 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 130 endif 131endif 132 133# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 134# in the FIP if the platform requires. 135ifneq ($(BL32_EXTRA1),) 136$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 137endif 138ifneq ($(BL32_EXTRA2),) 139$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 140endif 141 142# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 143ENABLE_PSCI_STAT := 1 144ENABLE_PMF := 1 145 146# Override the standard libc with optimised libc_asm 147OVERRIDE_LIBC := 1 148ifeq (${OVERRIDE_LIBC},1) 149 include lib/libc/libc_asm.mk 150endif 151 152# On ARM platforms, separate the code and read-only data sections to allow 153# mapping the former as executable and the latter as execute-never. 154SEPARATE_CODE_AND_RODATA := 1 155 156# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS 157# and NOBITS sections of BL31 image are adjacent to each other and loaded 158# into Trusted SRAM. 159SEPARATE_NOBITS_REGION := 0 160 161# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load 162# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate 163# the build to require that ARM_BL31_IN_DRAM is enabled as well. 164ifeq ($(SEPARATE_NOBITS_REGION),1) 165 ifneq ($(ARM_BL31_IN_DRAM),1) 166 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) 167 endif 168 ifneq ($(RECLAIM_INIT_CODE),0) 169 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) 170 endif 171endif 172 173# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case 174ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 175 ENABLE_PIE := 1 176endif 177 178# On Arm platform, disable ARM_FW_CONFIG_LOAD_ENABLE by default. 179ARM_FW_CONFIG_LOAD_ENABLE := 0 180$(eval $(call assert_boolean,ARM_FW_CONFIG_LOAD_ENABLE)) 181$(eval $(call add_define,ARM_FW_CONFIG_LOAD_ENABLE)) 182 183# In order to enable ARM_FW_CONFIG_LOAD_ENABLE for the Arm platform, the 184# platform should be reset to BL2 (RESET_TO_BL2=1), and FW_CONFIG must be 185# specified. 186ifeq (${ARM_FW_CONFIG_LOAD_ENABLE},1) 187 ifneq (${RESET_TO_BL2},1) 188 $(error RESET_TO_BL2 must be enabled when ARM_FW_CONFIG_LOAD_ENABLE \ 189 is enabled) 190 endif 191 ifeq (${FW_CONFIG},) 192 $(error FW_CONFIG must be specified when ARM_FW_CONFIG_LOAD_ENABLE \ 193 is enabled) 194 endif 195endif 196 197# Disable GPT parser support, use FIP image by default 198ARM_GPT_SUPPORT := 0 199$(eval $(call assert_boolean,ARM_GPT_SUPPORT)) 200$(eval $(call add_define,ARM_GPT_SUPPORT)) 201 202# Include necessary sources to parse GPT image 203ifeq (${ARM_GPT_SUPPORT}, 1) 204 BL2_SOURCES += drivers/partition/gpt.c \ 205 drivers/partition/partition.c 206endif 207 208# Enable CRC instructions via extension for ARMv8-A CPUs. 209# For ARMv8.1-A, and onwards CRC instructions are default enabled. 210# Enable HW computed CRC support unconditionally in BL2 component. 211ifeq (${ARM_ARCH_MAJOR},8) 212 ifeq (${ARM_ARCH_MINOR},0) 213 BL2_CPPFLAGS += -march=armv8-a+crc 214 endif 215endif 216 217ifeq ($(PSA_FWU_SUPPORT),1) 218 # GPT support is recommended as per PSA FWU specification hence 219 # PSA FWU implementation is tightly coupled with GPT support, 220 # and it does not support other formats. 221 ifneq ($(ARM_GPT_SUPPORT),1) 222 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled) 223 endif 224 FWU_MK := drivers/fwu/fwu.mk 225 $(info Including ${FWU_MK}) 226 include ${FWU_MK} 227endif 228 229ifeq (${ARCH}, aarch64) 230PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 231endif 232 233PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 234 plat/arm/common/arm_common.c \ 235 plat/arm/common/arm_console.c 236 237ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 238PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 239 lib/xlat_tables/${ARCH}/xlat_tables.c 240else 241include lib/xlat_tables_v2/xlat_tables.mk 242PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 243endif 244 245ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ 246 plat/arm/common/fconf/arm_fconf_io.c 247ifeq (${SPD},spmd) 248 ifeq (${BL2_ENABLE_SP_LOAD},1) 249 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c 250 endif 251endif 252 253BL1_SOURCES += drivers/io/io_fip.c \ 254 drivers/io/io_memmap.c \ 255 drivers/io/io_storage.c \ 256 plat/arm/common/arm_bl1_setup.c \ 257 plat/arm/common/arm_err.c \ 258 ${ARM_IO_SOURCES} 259 260ifdef EL3_PAYLOAD_BASE 261# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from 262# their holding pen 263BL1_SOURCES += plat/arm/common/arm_pm.c 264endif 265 266BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 267 drivers/delay_timer/generic_delay_timer.c \ 268 drivers/io/io_fip.c \ 269 drivers/io/io_memmap.c \ 270 drivers/io/io_storage.c \ 271 plat/arm/common/arm_bl2_setup.c \ 272 plat/arm/common/arm_err.c \ 273 common/tf_crc32.c \ 274 ${ARM_IO_SOURCES} 275 276# Firmware Configuration Framework sources 277include lib/fconf/fconf.mk 278 279BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 280BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 281 282# Add `libfdt` and Arm common helpers required for Dynamic Config 283include lib/libfdt/libfdt.mk 284 285DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 286 plat/arm/common/arm_dyn_cfg_helpers.c \ 287 common/uuid.c 288 289DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES} 290 291BL1_SOURCES += ${DYN_CFG_SOURCES} 292BL2_SOURCES += ${DYN_CFG_SOURCES} 293 294ifeq (${RESET_TO_BL2},1) 295BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c 296endif 297 298# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 299# the AArch32 descriptors. 300ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 301BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 302else 303ifeq ($(filter $(PLAT), corstone1000 rd1ae rdaspen),) 304BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 305endif 306endif 307BL2_SOURCES += plat/arm/common/arm_image_load.c \ 308 common/desc_image_load.c 309ifeq (${SPD},opteed) 310BL2_SOURCES += lib/optee/optee_utils.c 311endif 312 313BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 314 drivers/delay_timer/generic_delay_timer.c \ 315 plat/arm/common/arm_bl2u_setup.c 316 317BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 318 plat/arm/common/arm_pm.c \ 319 plat/arm/common/arm_topology.c \ 320 plat/common/plat_psci_common.c 321 322ifeq (${PLAT_ARM_ACS_SMC_HANDLER},1) 323BL31_SOURCES += plat/arm/common/plat_acs_smc_handler.c \ 324 ${VENDOR_EL3_SRCS} 325endif 326 327ifeq (${TRANSFER_LIST}, 1) 328include lib/transfer_list/transfer_list.mk 329 330BL1_SOURCES += plat/arm/common/arm_transfer_list.c 331BL2_SOURCES += plat/arm/common/arm_transfer_list.c 332BL31_SOURCES += plat/arm/common/arm_transfer_list.c 333endif 334 335ifneq ($(filter 1,${ENABLE_PMF} ${ETHOSN_NPU_DRIVER}),) 336ARM_SVC_HANDLER_SRCS := 337 338ifeq (${ENABLE_PMF},1) 339ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c 340endif 341 342ifeq (${ETHOSN_NPU_DRIVER},1) 343ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \ 344 drivers/delay_timer/delay_timer.c \ 345 drivers/arm/ethosn/ethosn_smc.c 346ifeq (${ETHOSN_NPU_TZMP1},1) 347ARM_SVC_HANDLER_SRCS += drivers/arm/ethosn/ethosn_big_fw.c 348endif 349endif 350 351ifeq (${ARCH}, aarch64) 352BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\ 353 plat/arm/common/arm_sip_svc.c \ 354 plat/arm/common/plat_arm_sip_svc.c \ 355 ${ARM_SVC_HANDLER_SRCS} 356else 357BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ 358 plat/arm/common/plat_arm_sip_svc.c \ 359 ${ARM_SVC_HANDLER_SRCS} 360endif 361endif 362 363ifeq (${EL3_EXCEPTION_HANDLING},1) 364BL31_SOURCES += plat/common/aarch64/plat_ehf.c 365endif 366 367ifeq (${SDEI_SUPPORT},1) 368BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 369ifeq (${SDEI_IN_FCONF},1) 370BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c 371endif 372endif 373 374# Pointer Authentication sources 375ifeq ($(BRANCH_PROTECTION),$(filter $(BRANCH_PROTECTION),1 2 3 5)) 376PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c 377endif 378 379ifeq (${SPD},spmd) 380BL31_SOURCES += plat/common/plat_spmd_manifest.c \ 381 common/uuid.c \ 382 ${LIBFDT_SRCS} 383 384BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 385endif 386 387ifeq (${DRTM_SUPPORT},1) 388BL31_SOURCES += plat/arm/common/arm_err.c 389endif 390 391ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),) 392 PLAT_INCLUDES += -Iplat/arm/common \ 393 -Iinclude/drivers/auth/mbedtls 394 ifeq (${HASH_ALG}, sha512) 395 ARM_ROTPK_HASH_LEN := 64 396 else ifeq (${HASH_ALG}, sha384) 397 ARM_ROTPK_HASH_LEN := 48 398 else 399 ARM_ROTPK_HASH_LEN := 32 400 endif 401 $(eval $(call add_define,ARM_ROTPK_HASH_LEN)) 402endif 403 404ifneq (${TRUSTED_BOARD_BOOT},0) 405 406 # Include common TBB sources 407 AUTH_MK := drivers/auth/auth.mk 408 $(info Including ${AUTH_MK}) 409 include ${AUTH_MK} 410 411 # Include the selected chain of trust sources. 412 ifeq (${COT},tbbr) 413 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 414 drivers/auth/tbbr/tbbr_cot_bl1.c 415 ifneq (${COT_DESC_IN_DTB},0) 416 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 417 else 418 # Juno has its own TBBR CoT file for BL2 419 ifeq (${PLAT},juno) 420 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c 421 endif 422 endif 423 else ifeq (${COT},dualroot) 424 BL1_SOURCES += drivers/auth/dualroot/bl1_cot.c 425 ifneq (${COT_DESC_IN_DTB},0) 426 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 427 endif 428 else ifeq (${COT},cca) 429 BL1_SOURCES += drivers/auth/cca/bl1_cot.c 430 ifneq (${COT_DESC_IN_DTB},0) 431 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 432 endif 433 else 434 $(error Unknown chain of trust ${COT}) 435 endif 436 437 ifeq (${COT_DESC_IN_DTB},0) 438 ifeq (${COT},dualroot) 439 COTDTPATH := fdts/dualroot_cot_descriptors.dts 440 else ifeq (${COT},cca) 441 COTDTPATH := fdts/cca_cot_descriptors.dts 442 else ifeq (${COT},tbbr) 443 ifneq (${PLAT},juno) 444 COTDTPATH := fdts/tbbr_cot_descriptors.dts 445 endif 446 endif 447 endif 448 449 BL1_SOURCES += ${AUTH_SOURCES} \ 450 bl1/tbbr/tbbr_img_desc.c \ 451 plat/arm/common/arm_bl1_fwu.c \ 452 plat/common/tbbr/plat_tbbr.c 453 454 BL2_SOURCES += ${AUTH_SOURCES} \ 455 plat/common/tbbr/plat_tbbr.c 456 457 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 458 459 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 460 461 $(info Including ${IMG_PARSER_LIB_MK}) 462 include ${IMG_PARSER_LIB_MK} 463endif 464 465# Include Measured Boot makefile before any Crypto library makefile. 466# Crypto library makefile may need default definitions of Measured Boot build 467# flags present in Measured Boot makefile. 468ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),) 469 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk 470 $(info Including ${MEASURED_BOOT_MK}) 471 include ${MEASURED_BOOT_MK} 472 473 ifeq (${MEASURED_BOOT},1) 474 BL1_SOURCES += ${EVENT_LOG_SOURCES} 475 BL2_SOURCES += ${EVENT_LOG_SOURCES} 476 ifeq (${SPD_tspd},1) 477 BL32_SOURCES += ${EVENT_LOG_SOURCES} 478 endif 479 endif 480 481 ifeq (${DRTM_SUPPORT},1) 482 BL31_SOURCES += ${EVENT_LOG_SOURCES} 483 endif 484endif 485 486ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),) 487ifeq (${TRUSTED_BOARD_BOOT},0) 488 CRYPTO_SOURCES := drivers/auth/crypto_mod.c 489 BL1_SOURCES += ${CRYPTO_SOURCES} 490 BL2_SOURCES += ${CRYPTO_SOURCES} 491endif 492endif 493 494ifeq (${DRTM_SUPPORT},1) 495 BL31_SOURCES += drivers/auth/crypto_mod.c 496endif 497 498ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),) 499 FCONF_TBB_SOURCES := lib/fconf/fconf_tbbr_getter.c 500 BL1_SOURCES += ${FCONF_TBB_SOURCES} 501 BL2_SOURCES += ${FCONF_TBB_SOURCES} 502 503 # We expect to locate the *.mk files under the directories specified below 504 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 505 506 $(info Including ${CRYPTO_LIB_MK}) 507 include ${CRYPTO_LIB_MK} 508endif 509 510ifeq (${RECLAIM_INIT_CODE}, 1) 511 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 512 $(error To reclaim init code xlat tables v2 must be used) 513 endif 514endif 515 516ifneq ($(COTDTPATH),) 517 # no custom flags 518 $(eval $(call MAKE_PRE,$(BUILD_PLAT)/$(COTDTPATH),$(COTDTPATH),$(BUILD_PLAT)/$(COTDTPATH:.dts=.o.d))) 519 520 $(BUILD_PLAT)/$(COTDTPATH:.dts=.c): $(BUILD_PLAT)/$(COTDTPATH) | $$(@D)/ 521 $(if $(host-poetry),$(q)poetry -q install --no-root) 522 $(q)$(if $(host-poetry),poetry run )cot-dt2c convert-to-c $< $@ 523 524 BL2_SOURCES += $(BUILD_PLAT)/$(COTDTPATH:.dts=.c) 525endif 526