1# 2# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9ifeq (${ARCH},aarch32) 10 ifeq (${AARCH32_SP},none) 11 $(error Variable AARCH32_SP has to be set for AArch32) 12 endif 13endif 14 15ifeq (${ARCH}, aarch64) 16 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 17 # DRAM (if available) or the TZC secured area of DRAM. 18 # TZC secured DRAM is the default. 19 20 ARM_TSP_RAM_LOCATION ?= dram 21 22 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 23 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 24 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 25 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 26 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 27 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 28 else 29 $(error "Unsupported ARM_TSP_RAM_LOCATION value") 30 endif 31 32 # Process flags 33 # Process ARM_BL31_IN_DRAM flag 34 ARM_BL31_IN_DRAM := 0 35 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 36 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 37else 38 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 39endif 40 41$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 42 43 44# For the original power-state parameter format, the State-ID can be encoded 45# according to the recommended encoding or zero. This flag determines which 46# State-ID encoding to be parsed. 47ARM_RECOM_STATE_ID_ENC := 0 48 49# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 50# be set. Else throw a build error. 51ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 52 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 53 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 54 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 55 endif 56endif 57 58# Process ARM_RECOM_STATE_ID_ENC flag 59$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 60$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 61 62# Process ARM_DISABLE_TRUSTED_WDOG flag 63# By default, Trusted Watchdog is always enabled unless 64# SPIN_ON_BL1_EXIT or ENABLE_RME is set 65ARM_DISABLE_TRUSTED_WDOG := 0 66ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),) 67ARM_DISABLE_TRUSTED_WDOG := 1 68endif 69$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 70$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 71 72# Process ARM_CONFIG_CNTACR 73ARM_CONFIG_CNTACR := 1 74$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 75$(eval $(call add_define,ARM_CONFIG_CNTACR)) 76 77# Process ARM_BL31_IN_DRAM flag 78ARM_BL31_IN_DRAM := 0 79$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 80$(eval $(call add_define,ARM_BL31_IN_DRAM)) 81 82# As per CCA security model, all root firmware must execute from on-chip secure 83# memory. This means we must not run BL31 from TZC-protected DRAM. 84ifeq (${ARM_BL31_IN_DRAM},1) 85 ifeq (${ENABLE_RME},1) 86 $(error "BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0") 87 endif 88endif 89 90# Process ARM_PLAT_MT flag 91ARM_PLAT_MT := 0 92$(eval $(call assert_boolean,ARM_PLAT_MT)) 93$(eval $(call add_define,ARM_PLAT_MT)) 94 95# Use translation tables library v2 by default 96ARM_XLAT_TABLES_LIB_V1 := 0 97$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 98$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 99 100# Don't have the Linux kernel as a BL33 image by default 101ARM_LINUX_KERNEL_AS_BL33 := 0 102$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 103$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 104 105ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) 106 ifneq (${ARCH},aarch64) 107 ifneq (${RESET_TO_SP_MIN},1) 108 $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.") 109 endif 110 endif 111 ifndef PRELOADED_BL33_BASE 112 $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.") 113 endif 114 ifeq (${RESET_TO_BL31},1) 115 ifndef ARM_PRELOADED_DTB_BASE 116 $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is 117 used with RESET_TO_BL31.") 118 endif 119 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 120 endif 121endif 122 123# Use an implementation of SHA-256 with a smaller memory footprint but reduced 124# speed. 125$(eval $(call add_define,MBEDTLS_SHA256_SMALLER)) 126 127# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 128# in the FIP if the platform requires. 129ifneq ($(BL32_EXTRA1),) 130$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 131endif 132ifneq ($(BL32_EXTRA2),) 133$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 134endif 135 136# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 137ENABLE_PSCI_STAT := 1 138ENABLE_PMF := 1 139 140# Override the standard libc with optimised libc_asm 141OVERRIDE_LIBC := 1 142ifeq (${OVERRIDE_LIBC},1) 143 include lib/libc/libc_asm.mk 144endif 145 146# On ARM platforms, separate the code and read-only data sections to allow 147# mapping the former as executable and the latter as execute-never. 148SEPARATE_CODE_AND_RODATA := 1 149 150# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS 151# and NOBITS sections of BL31 image are adjacent to each other and loaded 152# into Trusted SRAM. 153SEPARATE_NOBITS_REGION := 0 154 155# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load 156# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate 157# the build to require that ARM_BL31_IN_DRAM is enabled as well. 158ifeq ($(SEPARATE_NOBITS_REGION),1) 159 ifneq ($(ARM_BL31_IN_DRAM),1) 160 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) 161 endif 162 ifneq ($(RECLAIM_INIT_CODE),0) 163 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) 164 endif 165endif 166 167# Disable ARM Cryptocell by default 168ARM_CRYPTOCELL_INTEG := 0 169$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG)) 170$(eval $(call add_define,ARM_CRYPTOCELL_INTEG)) 171 172# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case 173ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 174 ENABLE_PIE := 1 175endif 176 177# CryptoCell integration relies on coherent buffers for passing data from 178# the AP CPU to the CryptoCell 179ifeq (${ARM_CRYPTOCELL_INTEG},1) 180 ifeq (${USE_COHERENT_MEM},0) 181 $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.") 182 endif 183endif 184 185# Disable GPT parser support, use FIP image by default 186ARM_GPT_SUPPORT := 0 187$(eval $(call assert_boolean,ARM_GPT_SUPPORT)) 188$(eval $(call add_define,ARM_GPT_SUPPORT)) 189 190# Include necessary sources to parse GPT image 191ifeq (${ARM_GPT_SUPPORT}, 1) 192 BL2_SOURCES += drivers/partition/gpt.c \ 193 drivers/partition/partition.c 194endif 195 196# Enable CRC instructions via extension for ARMv8-A CPUs. 197# For ARMv8.1-A, and onwards CRC instructions are default enabled. 198# Enable HW computed CRC support unconditionally in BL2 component. 199ifeq (${ARM_ARCH_MAJOR},8) 200 ifeq (${ARM_ARCH_MINOR},0) 201 BL2_CPPFLAGS += -march=armv8-a+crc 202 endif 203endif 204 205ifeq ($(PSA_FWU_SUPPORT),1) 206 # GPT support is recommended as per PSA FWU specification hence 207 # PSA FWU implementation is tightly coupled with GPT support, 208 # and it does not support other formats. 209 ifneq ($(ARM_GPT_SUPPORT),1) 210 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled) 211 endif 212 FWU_MK := drivers/fwu/fwu.mk 213 $(info Including ${FWU_MK}) 214 include ${FWU_MK} 215endif 216 217ifeq (${ARCH}, aarch64) 218PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 219endif 220 221PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 222 plat/arm/common/arm_common.c \ 223 plat/arm/common/arm_console.c 224 225ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 226PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 227 lib/xlat_tables/${ARCH}/xlat_tables.c 228else 229ifeq (${XLAT_MPU_LIB_V1}, 1) 230include lib/xlat_mpu/xlat_mpu.mk 231PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS} 232else 233include lib/xlat_tables_v2/xlat_tables.mk 234PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 235endif 236endif 237 238ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ 239 plat/arm/common/fconf/arm_fconf_io.c 240ifeq (${SPD},spmd) 241 ifeq (${BL2_ENABLE_SP_LOAD},1) 242 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c 243 endif 244endif 245 246BL1_SOURCES += drivers/io/io_fip.c \ 247 drivers/io/io_memmap.c \ 248 drivers/io/io_storage.c \ 249 plat/arm/common/arm_bl1_setup.c \ 250 plat/arm/common/arm_err.c \ 251 ${ARM_IO_SOURCES} 252 253ifdef EL3_PAYLOAD_BASE 254# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from 255# their holding pen 256BL1_SOURCES += plat/arm/common/arm_pm.c 257endif 258 259BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 260 drivers/delay_timer/generic_delay_timer.c \ 261 drivers/io/io_fip.c \ 262 drivers/io/io_memmap.c \ 263 drivers/io/io_storage.c \ 264 plat/arm/common/arm_bl2_setup.c \ 265 plat/arm/common/arm_err.c \ 266 common/tf_crc32.c \ 267 ${ARM_IO_SOURCES} 268 269# Firmware Configuration Framework sources 270include lib/fconf/fconf.mk 271 272BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 273BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 274 275# Add `libfdt` and Arm common helpers required for Dynamic Config 276include lib/libfdt/libfdt.mk 277 278DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 279 plat/arm/common/arm_dyn_cfg_helpers.c \ 280 common/uuid.c 281 282DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES} 283 284BL1_SOURCES += ${DYN_CFG_SOURCES} 285BL2_SOURCES += ${DYN_CFG_SOURCES} 286 287ifeq (${RESET_TO_BL2},1) 288BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c 289endif 290 291# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 292# the AArch32 descriptors. 293ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 294BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 295else 296ifneq (${PLAT}, corstone1000) 297BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 298endif 299endif 300BL2_SOURCES += plat/arm/common/arm_image_load.c \ 301 common/desc_image_load.c 302ifeq (${SPD},opteed) 303BL2_SOURCES += lib/optee/optee_utils.c 304endif 305 306BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 307 drivers/delay_timer/generic_delay_timer.c \ 308 plat/arm/common/arm_bl2u_setup.c 309 310BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 311 plat/arm/common/arm_pm.c \ 312 plat/arm/common/arm_topology.c \ 313 plat/common/plat_psci_common.c 314 315ifneq ($(filter 1,${ENABLE_PMF} ${ETHOSN_NPU_DRIVER}),) 316ARM_SVC_HANDLER_SRCS := 317 318ifeq (${ENABLE_PMF},1) 319ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c 320endif 321 322ifeq (${ETHOSN_NPU_DRIVER},1) 323ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \ 324 drivers/delay_timer/delay_timer.c \ 325 drivers/arm/ethosn/ethosn_smc.c 326ifeq (${ETHOSN_NPU_TZMP1},1) 327ARM_SVC_HANDLER_SRCS += drivers/arm/ethosn/ethosn_big_fw.c 328endif 329endif 330 331ifeq (${ARCH}, aarch64) 332BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\ 333 plat/arm/common/arm_sip_svc.c \ 334 ${ARM_SVC_HANDLER_SRCS} 335else 336BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ 337 ${ARM_SVC_HANDLER_SRCS} 338endif 339endif 340 341ifeq (${EL3_EXCEPTION_HANDLING},1) 342BL31_SOURCES += plat/common/aarch64/plat_ehf.c 343endif 344 345ifeq (${SDEI_SUPPORT},1) 346BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 347ifeq (${SDEI_IN_FCONF},1) 348BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c 349endif 350endif 351 352# RAS sources 353ifeq (${RAS_FFH_SUPPORT},1) 354BL31_SOURCES += lib/extensions/ras/std_err_record.c \ 355 lib/extensions/ras/ras_common.c 356endif 357 358# Pointer Authentication sources 359ifeq (${ENABLE_PAUTH}, 1) 360PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c 361endif 362 363ifeq (${SPD},spmd) 364BL31_SOURCES += plat/common/plat_spmd_manifest.c \ 365 common/uuid.c \ 366 ${LIBFDT_SRCS} 367 368BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 369endif 370 371ifeq (${DRTM_SUPPORT},1) 372BL31_SOURCES += plat/arm/common/arm_err.c 373endif 374 375ifneq (${TRUSTED_BOARD_BOOT},0) 376 377 # Include common TBB sources 378 AUTH_SOURCES := drivers/auth/auth_mod.c \ 379 drivers/auth/img_parser_mod.c 380 381 # Include the selected chain of trust sources. 382 ifeq (${COT},tbbr) 383 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 384 drivers/auth/tbbr/tbbr_cot_bl1.c 385 ifneq (${COT_DESC_IN_DTB},0) 386 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 387 else 388 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c 389 # Juno has its own TBBR CoT file for BL2 390 ifneq (${PLAT},juno) 391 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_bl2.c 392 endif 393 endif 394 else ifeq (${COT},dualroot) 395 AUTH_SOURCES += drivers/auth/dualroot/cot.c 396 else ifeq (${COT},cca) 397 AUTH_SOURCES += drivers/auth/cca/cot.c 398 else 399 $(error Unknown chain of trust ${COT}) 400 endif 401 402 BL1_SOURCES += ${AUTH_SOURCES} \ 403 bl1/tbbr/tbbr_img_desc.c \ 404 plat/arm/common/arm_bl1_fwu.c \ 405 plat/common/tbbr/plat_tbbr.c 406 407 BL2_SOURCES += ${AUTH_SOURCES} \ 408 plat/common/tbbr/plat_tbbr.c 409 410 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 411 412 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 413 414 $(info Including ${IMG_PARSER_LIB_MK}) 415 include ${IMG_PARSER_LIB_MK} 416endif 417 418# Include Measured Boot makefile before any Crypto library makefile. 419# Crypto library makefile may need default definitions of Measured Boot build 420# flags present in Measured Boot makefile. 421ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),) 422 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk 423 $(info Including ${MEASURED_BOOT_MK}) 424 include ${MEASURED_BOOT_MK} 425 426 ifneq (${MBOOT_EL_HASH_ALG}, sha256) 427 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512)) 428 endif 429 430 ifeq (${MEASURED_BOOT},1) 431 BL1_SOURCES += ${EVENT_LOG_SOURCES} 432 BL2_SOURCES += ${EVENT_LOG_SOURCES} 433 endif 434 435 ifeq (${DRTM_SUPPORT},1) 436 BL31_SOURCES += ${EVENT_LOG_SOURCES} 437 endif 438endif 439 440ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),) 441 CRYPTO_SOURCES := drivers/auth/crypto_mod.c \ 442 lib/fconf/fconf_tbbr_getter.c 443 BL1_SOURCES += ${CRYPTO_SOURCES} 444 BL2_SOURCES += ${CRYPTO_SOURCES} 445 BL31_SOURCES += drivers/auth/crypto_mod.c 446 447 # We expect to locate the *.mk files under the directories specified below 448 ifeq (${ARM_CRYPTOCELL_INTEG},0) 449 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 450 else 451 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk 452 endif 453 454 $(info Including ${CRYPTO_LIB_MK}) 455 include ${CRYPTO_LIB_MK} 456endif 457 458ifeq (${RECLAIM_INIT_CODE}, 1) 459 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 460 $(error "To reclaim init code xlat tables v2 must be used") 461 endif 462endif 463