xref: /rk3399_ARM-atf/plat/arm/common/arm_common.mk (revision af61b50c1077b6d936c8ed741c1d0b8e43eb2b19)
1#
2# Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include common/fdt_wrappers.mk
8
9ifeq (${ARCH},aarch32)
10    ifeq (${AARCH32_SP},none)
11        $(error Variable AARCH32_SP has to be set for AArch32)
12    endif
13endif
14
15ifeq (${ARCH}, aarch64)
16  # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
17  # DRAM (if available) or the TZC secured area of DRAM.
18  # TZC secured DRAM is the default.
19
20  ARM_TSP_RAM_LOCATION	?=	dram
21
22  ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
23    ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
24  else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
25    ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
26  else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
27    ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
28  else
29    $(error Unsupported ARM_TSP_RAM_LOCATION value)
30  endif
31
32  # Process flags
33  # Process ARM_BL31_IN_DRAM flag
34  ARM_BL31_IN_DRAM		:=	0
35  $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
36  $(eval $(call add_define,ARM_BL31_IN_DRAM))
37else
38  ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
39endif
40
41$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
42
43
44# For the original power-state parameter format, the State-ID can be encoded
45# according to the recommended encoding or zero. This flag determines which
46# State-ID encoding to be parsed.
47ARM_RECOM_STATE_ID_ENC := 0
48
49# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
50# be set. Else throw a build error.
51ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
52  ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
53    $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
54            PSCI_EXTENDED_STATE_ID is set for ARM platforms)
55  endif
56endif
57
58# Process ARM_RECOM_STATE_ID_ENC flag
59$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
60$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
61
62# Process ARM_DISABLE_TRUSTED_WDOG flag
63# By default, Trusted Watchdog is always enabled unless
64# SPIN_ON_BL1_EXIT or ENABLE_RME is set
65ARM_DISABLE_TRUSTED_WDOG	:=	0
66ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),)
67ARM_DISABLE_TRUSTED_WDOG	:=	1
68endif
69$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
70$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
71
72# Process ARM_CONFIG_CNTACR
73ARM_CONFIG_CNTACR		:=	1
74$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
75$(eval $(call add_define,ARM_CONFIG_CNTACR))
76
77# Process ARM_BL31_IN_DRAM flag
78ARM_BL31_IN_DRAM		:=	0
79$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
80$(eval $(call add_define,ARM_BL31_IN_DRAM))
81
82# As per CCA security model, all root firmware must execute from on-chip secure
83# memory. This means we must not run BL31 from TZC-protected DRAM.
84ifeq (${ARM_BL31_IN_DRAM},1)
85  ifeq (${ENABLE_RME},1)
86    $(error BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0)
87  endif
88endif
89
90# Process ARM_PLAT_MT flag
91ARM_PLAT_MT			:=	0
92$(eval $(call assert_boolean,ARM_PLAT_MT))
93$(eval $(call add_define,ARM_PLAT_MT))
94
95# Use translation tables library v2 by default
96ARM_XLAT_TABLES_LIB_V1		:=	0
97$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
98$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
99
100# Don't have the Linux kernel as a BL33 image by default
101ARM_LINUX_KERNEL_AS_BL33	:=	0
102$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
103$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
104
105ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
106  ifneq (${ARCH},aarch64)
107    ifneq (${RESET_TO_SP_MIN},1)
108      $(error ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.)
109    endif
110  endif
111  ifeq (${RESET_TO_BL31},1)
112    ifndef ARM_PRELOADED_DTB_BASE
113      $(error ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used with RESET_TO_BL31.)
114    endif
115    $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
116  endif
117endif
118
119# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
120# in the FIP if the platform requires.
121ifneq ($(BL32_EXTRA1),)
122$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
123endif
124ifneq ($(BL32_EXTRA2),)
125$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
126endif
127
128# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
129ENABLE_PSCI_STAT		:=	1
130ENABLE_PMF			:=	1
131
132# Override the standard libc with optimised libc_asm
133OVERRIDE_LIBC			:=	1
134ifeq (${OVERRIDE_LIBC},1)
135    include lib/libc/libc_asm.mk
136endif
137
138# On ARM platforms, separate the code and read-only data sections to allow
139# mapping the former as executable and the latter as execute-never.
140SEPARATE_CODE_AND_RODATA	:=	1
141
142# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
143# and NOBITS sections of BL31 image are adjacent to each other and loaded
144# into Trusted SRAM.
145SEPARATE_NOBITS_REGION		:=	0
146
147# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
148# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
149# the build to require that ARM_BL31_IN_DRAM is enabled as well.
150ifeq ($(SEPARATE_NOBITS_REGION),1)
151    ifneq ($(ARM_BL31_IN_DRAM),1)
152         $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
153    endif
154    ifneq ($(RECLAIM_INIT_CODE),0)
155          $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
156    endif
157endif
158
159# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case
160ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
161	ENABLE_PIE			:=	1
162endif
163
164# On Arm platform, disable ARM_FW_CONFIG_LOAD_ENABLE by default.
165ARM_FW_CONFIG_LOAD_ENABLE		:= 0
166$(eval $(call assert_boolean,ARM_FW_CONFIG_LOAD_ENABLE))
167$(eval $(call add_define,ARM_FW_CONFIG_LOAD_ENABLE))
168
169# In order to enable ARM_FW_CONFIG_LOAD_ENABLE for the Arm platform, the
170# platform should be reset to BL2 (RESET_TO_BL2=1), and FW_CONFIG must be
171# specified.
172ifeq (${ARM_FW_CONFIG_LOAD_ENABLE},1)
173    ifneq (${RESET_TO_BL2},1)
174        $(error RESET_TO_BL2 must be enabled when ARM_FW_CONFIG_LOAD_ENABLE \
175            is enabled)
176    endif
177    ifeq (${FW_CONFIG},)
178        $(error FW_CONFIG must be specified when ARM_FW_CONFIG_LOAD_ENABLE \
179            is enabled)
180    endif
181endif
182
183# Disable GPT parser support, use FIP image by default
184ARM_GPT_SUPPORT			:=	0
185$(eval $(call assert_boolean,ARM_GPT_SUPPORT))
186$(eval $(call add_define,ARM_GPT_SUPPORT))
187
188# Include necessary sources to parse GPT image
189ifeq (${ARM_GPT_SUPPORT}, 1)
190  BL2_SOURCES	+=	drivers/partition/gpt.c		\
191			drivers/partition/partition.c
192endif
193
194# Enable CRC instructions via extension for ARMv8-A CPUs.
195# For ARMv8.1-A, and onwards CRC instructions are default enabled.
196# Enable HW computed CRC support unconditionally in BL2 component.
197ifeq (${ARM_ARCH_MAJOR},8)
198    ifeq (${ARM_ARCH_MINOR},0)
199        BL2_CPPFLAGS += -march=armv8-a+crc
200    endif
201endif
202
203ifeq ($(PSA_FWU_SUPPORT),1)
204    # GPT support is recommended as per PSA FWU specification hence
205    # PSA FWU implementation is tightly coupled with GPT support,
206    # and it does not support other formats.
207    ifneq ($(ARM_GPT_SUPPORT),1)
208      $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled)
209    endif
210    FWU_MK := drivers/fwu/fwu.mk
211    $(info Including ${FWU_MK})
212    include ${FWU_MK}
213endif
214
215ifeq (${ARCH}, aarch64)
216PLAT_INCLUDES		+=	-Iinclude/plat/arm/common/aarch64
217endif
218
219PLAT_BL_COMMON_SOURCES	+=	plat/arm/common/${ARCH}/arm_helpers.S		\
220				plat/arm/common/arm_common.c			\
221				plat/arm/common/arm_console.c
222
223ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
224PLAT_BL_COMMON_SOURCES 	+=	lib/xlat_tables/xlat_tables_common.c	      \
225				lib/xlat_tables/${ARCH}/xlat_tables.c
226else
227ifeq (${XLAT_MPU_LIB_V1}, 1)
228include lib/xlat_mpu/xlat_mpu.mk
229PLAT_BL_COMMON_SOURCES	+=	${XLAT_MPU_LIB_V1_SRCS}
230else
231include lib/xlat_tables_v2/xlat_tables.mk
232PLAT_BL_COMMON_SOURCES	+=      ${XLAT_TABLES_LIB_SRCS}
233endif
234endif
235
236ARM_IO_SOURCES		+=	plat/arm/common/arm_io_storage.c		\
237				plat/arm/common/fconf/arm_fconf_io.c
238ifeq (${SPD},spmd)
239    ifeq (${BL2_ENABLE_SP_LOAD},1)
240         ARM_IO_SOURCES		+=	plat/arm/common/fconf/arm_fconf_sp.c
241    endif
242endif
243
244BL1_SOURCES		+=	drivers/io/io_fip.c				\
245				drivers/io/io_memmap.c				\
246				drivers/io/io_storage.c				\
247				plat/arm/common/arm_bl1_setup.c			\
248				plat/arm/common/arm_err.c			\
249				${ARM_IO_SOURCES}
250
251ifdef EL3_PAYLOAD_BASE
252# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from
253# their holding pen
254BL1_SOURCES		+=	plat/arm/common/arm_pm.c
255endif
256
257BL2_SOURCES		+=	drivers/delay_timer/delay_timer.c		\
258				drivers/delay_timer/generic_delay_timer.c	\
259				drivers/io/io_fip.c				\
260				drivers/io/io_memmap.c				\
261				drivers/io/io_storage.c				\
262				plat/arm/common/arm_bl2_setup.c			\
263				plat/arm/common/arm_err.c			\
264				common/tf_crc32.c				\
265				${ARM_IO_SOURCES}
266
267# Firmware Configuration Framework sources
268include lib/fconf/fconf.mk
269
270BL1_SOURCES		+=	${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
271BL2_SOURCES		+=	${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
272
273# Add `libfdt` and Arm common helpers required for Dynamic Config
274include lib/libfdt/libfdt.mk
275
276DYN_CFG_SOURCES		+=	plat/arm/common/arm_dyn_cfg.c		\
277				plat/arm/common/arm_dyn_cfg_helpers.c	\
278				common/uuid.c
279
280DYN_CFG_SOURCES		+=	${FDT_WRAPPERS_SOURCES}
281
282BL1_SOURCES		+=	${DYN_CFG_SOURCES}
283BL2_SOURCES		+=	${DYN_CFG_SOURCES}
284
285ifeq (${RESET_TO_BL2},1)
286BL2_SOURCES		+=	plat/arm/common/arm_bl2_el3_setup.c
287endif
288
289# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
290# the AArch32 descriptors.
291ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
292BL2_SOURCES		+=	plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
293else
294ifeq ($(filter $(PLAT), corstone1000 rd1ae),)
295BL2_SOURCES		+=	plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
296endif
297endif
298BL2_SOURCES		+=	plat/arm/common/arm_image_load.c		\
299				common/desc_image_load.c
300ifeq (${SPD},opteed)
301BL2_SOURCES		+=	lib/optee/optee_utils.c
302endif
303
304BL2U_SOURCES		+=	drivers/delay_timer/delay_timer.c		\
305				drivers/delay_timer/generic_delay_timer.c	\
306				plat/arm/common/arm_bl2u_setup.c
307
308BL31_SOURCES		+=	plat/arm/common/arm_bl31_setup.c		\
309				plat/arm/common/arm_pm.c			\
310				plat/arm/common/arm_topology.c			\
311				plat/common/plat_psci_common.c
312
313ifeq (${TRANSFER_LIST}, 1)
314	TRANSFER_LIST_SOURCES += plat/arm/common/arm_transfer_list.c
315endif
316
317ifneq ($(filter 1,${ENABLE_PMF} ${ETHOSN_NPU_DRIVER}),)
318ARM_SVC_HANDLER_SRCS :=
319
320ifeq (${ENABLE_PMF},1)
321ARM_SVC_HANDLER_SRCS	+=	lib/pmf/pmf_smc.c
322endif
323
324ifeq (${ETHOSN_NPU_DRIVER},1)
325ARM_SVC_HANDLER_SRCS	+=	plat/arm/common/fconf/fconf_ethosn_getter.c	\
326				drivers/delay_timer/delay_timer.c		\
327				drivers/arm/ethosn/ethosn_smc.c
328ifeq (${ETHOSN_NPU_TZMP1},1)
329ARM_SVC_HANDLER_SRCS	+=	drivers/arm/ethosn/ethosn_big_fw.c
330endif
331endif
332
333ifeq (${ARCH}, aarch64)
334BL31_SOURCES		+=	plat/arm/common/aarch64/execution_state_switch.c\
335				plat/arm/common/arm_sip_svc.c			\
336				plat/arm/common/plat_arm_sip_svc.c		\
337				${ARM_SVC_HANDLER_SRCS}
338else
339BL32_SOURCES		+=	plat/arm/common/arm_sip_svc.c			\
340				plat/arm/common/plat_arm_sip_svc.c		\
341				${ARM_SVC_HANDLER_SRCS}
342endif
343endif
344
345ifeq (${EL3_EXCEPTION_HANDLING},1)
346BL31_SOURCES		+=	plat/common/aarch64/plat_ehf.c
347endif
348
349ifeq (${SDEI_SUPPORT},1)
350BL31_SOURCES		+=	plat/arm/common/aarch64/arm_sdei.c
351ifeq (${SDEI_IN_FCONF},1)
352BL31_SOURCES		+=	plat/arm/common/fconf/fconf_sdei_getter.c
353endif
354endif
355
356# RAS sources
357ifeq (${ENABLE_FEAT_RAS}-${HANDLE_EA_EL3_FIRST_NS},1-1)
358BL31_SOURCES		+=	lib/extensions/ras/std_err_record.c		\
359				lib/extensions/ras/ras_common.c
360endif
361
362# Pointer Authentication sources
363ifeq ($(BRANCH_PROTECTION),$(filter $(BRANCH_PROTECTION),1 2 3))
364PLAT_BL_COMMON_SOURCES	+=	plat/arm/common/aarch64/arm_pauth.c
365endif
366
367ifeq (${SPD},spmd)
368BL31_SOURCES		+=	plat/common/plat_spmd_manifest.c	\
369				common/uuid.c				\
370				${LIBFDT_SRCS}
371
372BL31_SOURCES		+=	${FDT_WRAPPERS_SOURCES}
373endif
374
375ifeq (${DRTM_SUPPORT},1)
376BL31_SOURCES            +=	plat/arm/common/arm_err.c
377endif
378
379ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),)
380    PLAT_INCLUDES		+=	-Iplat/arm/common	\
381					-Iinclude/drivers/auth/mbedtls
382    ifeq (${HASH_ALG}, sha512)
383      ARM_ROTPK_HASH_LEN	:=	64
384    else ifeq (${HASH_ALG}, sha384)
385      ARM_ROTPK_HASH_LEN	:=	48
386    else
387      ARM_ROTPK_HASH_LEN	:=	32
388    endif
389    $(eval $(call add_define,ARM_ROTPK_HASH_LEN))
390endif
391
392ifneq (${TRUSTED_BOARD_BOOT},0)
393
394    # Include common TBB sources
395    AUTH_SOURCES 	:= 	drivers/auth/auth_mod.c	\
396				drivers/auth/img_parser_mod.c
397
398    # Include the selected chain of trust sources.
399    ifeq (${COT},tbbr)
400            BL1_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_common.c		\
401				drivers/auth/tbbr/tbbr_cot_bl1.c
402        ifneq (${COT_DESC_IN_DTB},0)
403            BL2_SOURCES	+=	lib/fconf/fconf_cot_getter.c
404        else
405	    # Juno has its own TBBR CoT file for BL2
406            ifeq (${PLAT},juno)
407                BL2_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_common.c
408            endif
409        endif
410    else ifeq (${COT},dualroot)
411        BL1_SOURCES	+=	drivers/auth/dualroot/bl1_cot.c
412        ifneq (${COT_DESC_IN_DTB},0)
413            BL2_SOURCES	+=	lib/fconf/fconf_cot_getter.c
414        endif
415    else ifeq (${COT},cca)
416        BL1_SOURCES	+=	drivers/auth/cca/bl1_cot.c
417        ifneq (${COT_DESC_IN_DTB},0)
418            BL2_SOURCES	+=	lib/fconf/fconf_cot_getter.c
419        endif
420    else
421        $(error Unknown chain of trust ${COT})
422    endif
423
424    ifeq (${COT_DESC_IN_DTB},0)
425      ifeq (${COT},dualroot)
426        COTDTPATH := fdts/dualroot_cot_descriptors.dtsi
427      else ifeq (${COT},cca)
428        COTDTPATH := fdts/cca_cot_descriptors.dtsi
429      else ifeq (${COT},tbbr)
430        ifneq (${PLAT},juno)
431          COTDTPATH := fdts/tbbr_cot_descriptors.dtsi
432        endif
433      endif
434    endif
435
436    BL1_SOURCES		+=	${AUTH_SOURCES}					\
437				bl1/tbbr/tbbr_img_desc.c			\
438				plat/arm/common/arm_bl1_fwu.c			\
439				plat/common/tbbr/plat_tbbr.c
440
441    BL2_SOURCES		+=	${AUTH_SOURCES}					\
442				plat/common/tbbr/plat_tbbr.c
443
444    $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
445
446    IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
447
448    $(info Including ${IMG_PARSER_LIB_MK})
449    include ${IMG_PARSER_LIB_MK}
450endif
451
452# Include Measured Boot makefile before any Crypto library makefile.
453# Crypto library makefile may need default definitions of Measured Boot build
454# flags present in Measured Boot makefile.
455ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),)
456    MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
457    $(info Including ${MEASURED_BOOT_MK})
458    include ${MEASURED_BOOT_MK}
459
460    ifeq (${MEASURED_BOOT},1)
461         BL1_SOURCES		+= 	${EVENT_LOG_SOURCES}
462         BL2_SOURCES		+= 	${EVENT_LOG_SOURCES}
463    endif
464
465    ifeq (${DRTM_SUPPORT},1)
466         BL31_SOURCES	        += 	${EVENT_LOG_SOURCES}
467    endif
468endif
469
470ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),)
471    CRYPTO_SOURCES	:=	drivers/auth/crypto_mod.c 	\
472				lib/fconf/fconf_tbbr_getter.c
473    BL1_SOURCES		+=	${CRYPTO_SOURCES}
474    BL2_SOURCES		+=	${CRYPTO_SOURCES}
475    BL31_SOURCES	+=	drivers/auth/crypto_mod.c
476
477    # We expect to locate the *.mk files under the directories specified below
478    CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
479
480    $(info Including ${CRYPTO_LIB_MK})
481    include ${CRYPTO_LIB_MK}
482endif
483
484ifeq (${RECLAIM_INIT_CODE}, 1)
485    ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
486        $(error To reclaim init code xlat tables v2 must be used)
487    endif
488endif
489
490ifneq ($(COTDTPATH),)
491        cot-dt-defines = IMAGE_BL2 $(BL2_DEFINES) $(PLAT_BL_COMMON_DEFINES)
492        cot-dt-include-dirs = $(BL2_INCLUDE_DIRS) $(PLAT_BL_COMMON_INCLUDE_DIRS)
493
494        cot-dt-cpp-flags  = $(cot-dt-defines:%=-D%)
495        cot-dt-cpp-flags += $(cot-dt-include-dirs:%=-I%)
496
497        cot-dt-cpp-flags += $(BL2_CPPFLAGS) $(PLAT_BL_COMMON_CPPFLAGS)
498        cot-dt-cpp-flags += $(CPPFLAGS) $(BL_CPPFLAGS) $(TF_CFLAGS_$(ARCH))
499        cot-dt-cpp-flags += -c -x assembler-with-cpp -E -P -o $@ $<
500
501        $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts): $(COTDTPATH) | $$(@D)/
502		$(q)$($(ARCH)-cpp) $(cot-dt-cpp-flags)
503
504        $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c): $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts) | $$(@D)/
505		$(if $(host-poetry),$(q)poetry -q install --no-root)
506		$(q)$(if $(host-poetry),poetry run )cot-dt2c convert-to-c $< $@
507
508        BL2_SOURCES += $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c)
509endif
510