1# 2# Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7ifeq (${ARCH}, aarch64) 8 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 9 # DRAM (if available) or the TZC secured area of DRAM. 10 # TZC secured DRAM is the default. 11 12 ARM_TSP_RAM_LOCATION ?= dram 13 14 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 15 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 16 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 17 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 18 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 19 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 20 else 21 $(error "Unsupported ARM_TSP_RAM_LOCATION value") 22 endif 23 24 # Process flags 25 # Process ARM_BL31_IN_DRAM flag 26 ARM_BL31_IN_DRAM := 0 27 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 28 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 29else 30 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 31endif 32 33$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 34 35 36# For the original power-state parameter format, the State-ID can be encoded 37# according to the recommended encoding or zero. This flag determines which 38# State-ID encoding to be parsed. 39ARM_RECOM_STATE_ID_ENC := 0 40 41# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 42# be set. Else throw a build error. 43ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 44 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 45 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 46 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 47 endif 48endif 49 50# Process ARM_RECOM_STATE_ID_ENC flag 51$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 52$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 53 54# Process ARM_DISABLE_TRUSTED_WDOG flag 55# By default, Trusted Watchdog is always enabled unless 56# SPIN_ON_BL1_EXIT or ENABLE_RME is set 57ARM_DISABLE_TRUSTED_WDOG := 0 58ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),) 59ARM_DISABLE_TRUSTED_WDOG := 1 60endif 61$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 62$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 63 64# Process ARM_CONFIG_CNTACR 65ARM_CONFIG_CNTACR := 1 66$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 67$(eval $(call add_define,ARM_CONFIG_CNTACR)) 68 69# Process ARM_BL31_IN_DRAM flag 70ARM_BL31_IN_DRAM := 0 71$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 72$(eval $(call add_define,ARM_BL31_IN_DRAM)) 73 74# Process ARM_PLAT_MT flag 75ARM_PLAT_MT := 0 76$(eval $(call assert_boolean,ARM_PLAT_MT)) 77$(eval $(call add_define,ARM_PLAT_MT)) 78 79# Use translation tables library v2 by default 80ARM_XLAT_TABLES_LIB_V1 := 0 81$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 82$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 83 84# Don't have the Linux kernel as a BL33 image by default 85ARM_LINUX_KERNEL_AS_BL33 := 0 86$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 87$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 88 89ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) 90 ifneq (${ARCH},aarch64) 91 ifneq (${RESET_TO_SP_MIN},1) 92 $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.") 93 endif 94 endif 95 ifndef PRELOADED_BL33_BASE 96 $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.") 97 endif 98 ifeq (${RESET_TO_BL31},1) 99 ifndef ARM_PRELOADED_DTB_BASE 100 $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is 101 used with RESET_TO_BL31.") 102 endif 103 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 104 endif 105endif 106 107# Arm Ethos-N NPU SiP service 108ARM_ETHOSN_NPU_DRIVER := 0 109$(eval $(call assert_boolean,ARM_ETHOSN_NPU_DRIVER)) 110$(eval $(call add_define,ARM_ETHOSN_NPU_DRIVER)) 111 112# Use an implementation of SHA-256 with a smaller memory footprint but reduced 113# speed. 114$(eval $(call add_define,MBEDTLS_SHA256_SMALLER)) 115 116# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 117# in the FIP if the platform requires. 118ifneq ($(BL32_EXTRA1),) 119$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 120endif 121ifneq ($(BL32_EXTRA2),) 122$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 123endif 124 125# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 126ENABLE_PSCI_STAT := 1 127ENABLE_PMF := 1 128 129# Override the standard libc with optimised libc_asm 130OVERRIDE_LIBC := 1 131ifeq (${OVERRIDE_LIBC},1) 132 include lib/libc/libc_asm.mk 133endif 134 135# On ARM platforms, separate the code and read-only data sections to allow 136# mapping the former as executable and the latter as execute-never. 137SEPARATE_CODE_AND_RODATA := 1 138 139# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS 140# and NOBITS sections of BL31 image are adjacent to each other and loaded 141# into Trusted SRAM. 142SEPARATE_NOBITS_REGION := 0 143 144# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load 145# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate 146# the build to require that ARM_BL31_IN_DRAM is enabled as well. 147ifeq ($(SEPARATE_NOBITS_REGION),1) 148 ifneq ($(ARM_BL31_IN_DRAM),1) 149 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) 150 endif 151 ifneq ($(RECLAIM_INIT_CODE),0) 152 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) 153 endif 154endif 155 156# Disable ARM Cryptocell by default 157ARM_CRYPTOCELL_INTEG := 0 158$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG)) 159$(eval $(call add_define,ARM_CRYPTOCELL_INTEG)) 160 161# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case 162ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 163 ENABLE_PIE := 1 164endif 165 166# CryptoCell integration relies on coherent buffers for passing data from 167# the AP CPU to the CryptoCell 168ifeq (${ARM_CRYPTOCELL_INTEG},1) 169 ifeq (${USE_COHERENT_MEM},0) 170 $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.") 171 endif 172endif 173 174# Disable GPT parser support, use FIP image by default 175ARM_GPT_SUPPORT := 0 176$(eval $(call assert_boolean,ARM_GPT_SUPPORT)) 177$(eval $(call add_define,ARM_GPT_SUPPORT)) 178 179# Include necessary sources to parse GPT image 180ifeq (${ARM_GPT_SUPPORT}, 1) 181 BL2_SOURCES += drivers/partition/gpt.c \ 182 drivers/partition/partition.c 183endif 184 185# Enable CRC instructions via extension for ARMv8-A CPUs. 186# For ARMv8.1-A, and onwards CRC instructions are default enabled. 187# Enable HW computed CRC support unconditionally in BL2 component. 188ifeq (${ARM_ARCH_MINOR},0) 189 BL2_CPPFLAGS += -march=armv8-a+crc 190endif 191 192ifeq ($(PSA_FWU_SUPPORT),1) 193 # GPT support is recommended as per PSA FWU specification hence 194 # PSA FWU implementation is tightly coupled with GPT support, 195 # and it does not support other formats. 196 ifneq ($(ARM_GPT_SUPPORT),1) 197 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled) 198 endif 199 FWU_MK := drivers/fwu/fwu.mk 200 $(info Including ${FWU_MK}) 201 include ${FWU_MK} 202endif 203 204ifeq (${ARCH}, aarch64) 205PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 206endif 207 208PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 209 plat/arm/common/arm_common.c \ 210 plat/arm/common/arm_console.c 211 212ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 213PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 214 lib/xlat_tables/${ARCH}/xlat_tables.c 215else 216ifeq (${XLAT_MPU_LIB_V1}, 1) 217include lib/xlat_mpu/xlat_mpu.mk 218PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS} 219else 220include lib/xlat_tables_v2/xlat_tables.mk 221PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 222endif 223endif 224 225ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ 226 plat/arm/common/fconf/arm_fconf_io.c 227ifeq (${SPD},spmd) 228 ifeq (${BL2_ENABLE_SP_LOAD},1) 229 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c 230 endif 231endif 232 233BL1_SOURCES += drivers/io/io_fip.c \ 234 drivers/io/io_memmap.c \ 235 drivers/io/io_storage.c \ 236 plat/arm/common/arm_bl1_setup.c \ 237 plat/arm/common/arm_err.c \ 238 ${ARM_IO_SOURCES} 239 240ifdef EL3_PAYLOAD_BASE 241# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from 242# their holding pen 243BL1_SOURCES += plat/arm/common/arm_pm.c 244endif 245 246BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 247 drivers/delay_timer/generic_delay_timer.c \ 248 drivers/io/io_fip.c \ 249 drivers/io/io_memmap.c \ 250 drivers/io/io_storage.c \ 251 plat/arm/common/arm_bl2_setup.c \ 252 plat/arm/common/arm_err.c \ 253 common/tf_crc32.c \ 254 ${ARM_IO_SOURCES} 255 256# Firmware Configuration Framework sources 257include lib/fconf/fconf.mk 258 259# Add `libfdt` and Arm common helpers required for Dynamic Config 260include lib/libfdt/libfdt.mk 261 262DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 263 plat/arm/common/arm_dyn_cfg_helpers.c \ 264 common/fdt_wrappers.c \ 265 common/uuid.c 266 267BL1_SOURCES += ${DYN_CFG_SOURCES} 268BL2_SOURCES += ${DYN_CFG_SOURCES} 269 270ifeq (${BL2_AT_EL3},1) 271BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c 272endif 273 274# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 275# the AArch32 descriptors. 276ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 277BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 278else 279ifeq ($(filter ${TARGET_PLATFORM}, fpga fvp),) 280BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 281endif 282endif 283BL2_SOURCES += plat/arm/common/arm_image_load.c \ 284 common/desc_image_load.c 285ifeq (${SPD},opteed) 286BL2_SOURCES += lib/optee/optee_utils.c 287endif 288 289BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 290 drivers/delay_timer/generic_delay_timer.c \ 291 plat/arm/common/arm_bl2u_setup.c 292 293BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 294 plat/arm/common/arm_pm.c \ 295 plat/arm/common/arm_topology.c \ 296 plat/common/plat_psci_common.c 297 298ifneq ($(filter 1,${ENABLE_PMF} ${ARM_ETHOSN_NPU_DRIVER}),) 299ARM_SVC_HANDLER_SRCS := 300 301ifeq (${ENABLE_PMF},1) 302ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c 303endif 304 305ifeq (${ARM_ETHOSN_NPU_DRIVER},1) 306ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \ 307 drivers/delay_timer/delay_timer.c \ 308 drivers/arm/ethosn/ethosn_smc.c 309endif 310 311ifeq (${ARCH}, aarch64) 312BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\ 313 plat/arm/common/arm_sip_svc.c \ 314 ${ARM_SVC_HANDLER_SRCS} 315else 316BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ 317 ${ARM_SVC_HANDLER_SRCS} 318endif 319endif 320 321ifeq (${EL3_EXCEPTION_HANDLING},1) 322BL31_SOURCES += plat/common/aarch64/plat_ehf.c 323endif 324 325ifeq (${SDEI_SUPPORT},1) 326BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 327ifeq (${SDEI_IN_FCONF},1) 328BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c 329endif 330endif 331 332# RAS sources 333ifeq (${RAS_EXTENSION},1) 334BL31_SOURCES += lib/extensions/ras/std_err_record.c \ 335 lib/extensions/ras/ras_common.c 336endif 337 338# Pointer Authentication sources 339ifeq (${ENABLE_PAUTH}, 1) 340PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c \ 341 lib/extensions/pauth/pauth_helpers.S 342endif 343 344ifeq (${SPD},spmd) 345BL31_SOURCES += plat/common/plat_spmd_manifest.c \ 346 common/fdt_wrappers.c \ 347 common/uuid.c \ 348 ${LIBFDT_SRCS} 349 350endif 351 352ifneq (${TRUSTED_BOARD_BOOT},0) 353 354 # Include common TBB sources 355 AUTH_SOURCES := drivers/auth/auth_mod.c \ 356 drivers/auth/crypto_mod.c \ 357 drivers/auth/img_parser_mod.c \ 358 lib/fconf/fconf_tbbr_getter.c 359 360 # Include the selected chain of trust sources. 361 ifeq (${COT},tbbr) 362 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 363 drivers/auth/tbbr/tbbr_cot_bl1.c 364 ifneq (${COT_DESC_IN_DTB},0) 365 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 366 else 367 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 368 drivers/auth/tbbr/tbbr_cot_bl2.c 369 endif 370 else ifeq (${COT},dualroot) 371 AUTH_SOURCES += drivers/auth/dualroot/cot.c 372 else 373 $(error Unknown chain of trust ${COT}) 374 endif 375 376 BL1_SOURCES += ${AUTH_SOURCES} \ 377 bl1/tbbr/tbbr_img_desc.c \ 378 plat/arm/common/arm_bl1_fwu.c \ 379 plat/common/tbbr/plat_tbbr.c 380 381 BL2_SOURCES += ${AUTH_SOURCES} \ 382 plat/common/tbbr/plat_tbbr.c 383 384 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 385 386 # We expect to locate the *.mk files under the directories specified below 387ifeq (${ARM_CRYPTOCELL_INTEG},0) 388 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 389else 390 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk 391endif 392 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 393 394 $(info Including ${CRYPTO_LIB_MK}) 395 include ${CRYPTO_LIB_MK} 396 397 $(info Including ${IMG_PARSER_LIB_MK}) 398 include ${IMG_PARSER_LIB_MK} 399 400endif 401 402ifeq (${RECLAIM_INIT_CODE}, 1) 403 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 404 $(error "To reclaim init code xlat tables v2 must be used") 405 endif 406endif 407 408ifeq (${MEASURED_BOOT},1) 409 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk 410 $(info Including ${MEASURED_BOOT_MK}) 411 include ${MEASURED_BOOT_MK} 412endif 413