1# 2# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9ifeq (${ARCH}, aarch64) 10 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 11 # DRAM (if available) or the TZC secured area of DRAM. 12 # TZC secured DRAM is the default. 13 14 ARM_TSP_RAM_LOCATION ?= dram 15 16 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 17 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 18 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 19 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 20 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 21 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 22 else 23 $(error "Unsupported ARM_TSP_RAM_LOCATION value") 24 endif 25 26 # Process flags 27 # Process ARM_BL31_IN_DRAM flag 28 ARM_BL31_IN_DRAM := 0 29 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 30 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 31else 32 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 33endif 34 35$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 36 37 38# For the original power-state parameter format, the State-ID can be encoded 39# according to the recommended encoding or zero. This flag determines which 40# State-ID encoding to be parsed. 41ARM_RECOM_STATE_ID_ENC := 0 42 43# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 44# be set. Else throw a build error. 45ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 46 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 47 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 48 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 49 endif 50endif 51 52# Process ARM_RECOM_STATE_ID_ENC flag 53$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 54$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 55 56# Process ARM_DISABLE_TRUSTED_WDOG flag 57# By default, Trusted Watchdog is always enabled unless 58# SPIN_ON_BL1_EXIT or ENABLE_RME is set 59ARM_DISABLE_TRUSTED_WDOG := 0 60ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),) 61ARM_DISABLE_TRUSTED_WDOG := 1 62endif 63$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 64$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 65 66# Process ARM_CONFIG_CNTACR 67ARM_CONFIG_CNTACR := 1 68$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 69$(eval $(call add_define,ARM_CONFIG_CNTACR)) 70 71# Process ARM_BL31_IN_DRAM flag 72ARM_BL31_IN_DRAM := 0 73$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 74$(eval $(call add_define,ARM_BL31_IN_DRAM)) 75 76# As per CCA security model, all root firmware must execute from on-chip secure 77# memory. This means we must not run BL31 from TZC-protected DRAM. 78ifeq (${ARM_BL31_IN_DRAM},1) 79 ifeq (${ENABLE_RME},1) 80 $(error "BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0") 81 endif 82endif 83 84# Process ARM_PLAT_MT flag 85ARM_PLAT_MT := 0 86$(eval $(call assert_boolean,ARM_PLAT_MT)) 87$(eval $(call add_define,ARM_PLAT_MT)) 88 89# Use translation tables library v2 by default 90ARM_XLAT_TABLES_LIB_V1 := 0 91$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 92$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 93 94# Don't have the Linux kernel as a BL33 image by default 95ARM_LINUX_KERNEL_AS_BL33 := 0 96$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 97$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 98 99ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) 100 ifneq (${ARCH},aarch64) 101 ifneq (${RESET_TO_SP_MIN},1) 102 $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.") 103 endif 104 endif 105 ifndef PRELOADED_BL33_BASE 106 $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.") 107 endif 108 ifeq (${RESET_TO_BL31},1) 109 ifndef ARM_PRELOADED_DTB_BASE 110 $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is 111 used with RESET_TO_BL31.") 112 endif 113 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 114 endif 115endif 116 117# Arm(R) Ethos(TM)-N NPU SiP service 118ARM_ETHOSN_NPU_DRIVER := 0 119$(eval $(call assert_boolean,ARM_ETHOSN_NPU_DRIVER)) 120$(eval $(call add_define,ARM_ETHOSN_NPU_DRIVER)) 121 122# Arm(R) Ethos(TM)-N NPU TZMP1 123ARM_ETHOSN_NPU_TZMP1 := 0 124$(eval $(call assert_boolean,ARM_ETHOSN_NPU_TZMP1)) 125$(eval $(call add_define,ARM_ETHOSN_NPU_TZMP1)) 126ifeq (${ARM_ETHOSN_NPU_TZMP1},1) 127 ifeq (${ARM_ETHOSN_NPU_DRIVER},0) 128 $(error ARM_ETHOSN_NPU_TZMP1 is only available if ARM_ETHOSN_NPU_DRIVER=1) 129 endif 130 ifeq (${PLAT},juno) 131 $(eval $(call add_define,JUNO_ETHOSN_TZMP1)) 132 else 133 $(error ARM_ETHOSN_NPU_TZMP1 only supported on Juno platform, not ${PLAT}) 134 endif 135endif 136 137# Use an implementation of SHA-256 with a smaller memory footprint but reduced 138# speed. 139$(eval $(call add_define,MBEDTLS_SHA256_SMALLER)) 140 141# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 142# in the FIP if the platform requires. 143ifneq ($(BL32_EXTRA1),) 144$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 145endif 146ifneq ($(BL32_EXTRA2),) 147$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 148endif 149 150# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 151ENABLE_PSCI_STAT := 1 152ENABLE_PMF := 1 153 154# Override the standard libc with optimised libc_asm 155OVERRIDE_LIBC := 1 156ifeq (${OVERRIDE_LIBC},1) 157 include lib/libc/libc_asm.mk 158endif 159 160# On ARM platforms, separate the code and read-only data sections to allow 161# mapping the former as executable and the latter as execute-never. 162SEPARATE_CODE_AND_RODATA := 1 163 164# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS 165# and NOBITS sections of BL31 image are adjacent to each other and loaded 166# into Trusted SRAM. 167SEPARATE_NOBITS_REGION := 0 168 169# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load 170# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate 171# the build to require that ARM_BL31_IN_DRAM is enabled as well. 172ifeq ($(SEPARATE_NOBITS_REGION),1) 173 ifneq ($(ARM_BL31_IN_DRAM),1) 174 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) 175 endif 176 ifneq ($(RECLAIM_INIT_CODE),0) 177 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) 178 endif 179endif 180 181# Disable ARM Cryptocell by default 182ARM_CRYPTOCELL_INTEG := 0 183$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG)) 184$(eval $(call add_define,ARM_CRYPTOCELL_INTEG)) 185 186# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case 187ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 188 ENABLE_PIE := 1 189endif 190 191# CryptoCell integration relies on coherent buffers for passing data from 192# the AP CPU to the CryptoCell 193ifeq (${ARM_CRYPTOCELL_INTEG},1) 194 ifeq (${USE_COHERENT_MEM},0) 195 $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.") 196 endif 197endif 198 199# Disable GPT parser support, use FIP image by default 200ARM_GPT_SUPPORT := 0 201$(eval $(call assert_boolean,ARM_GPT_SUPPORT)) 202$(eval $(call add_define,ARM_GPT_SUPPORT)) 203 204# Include necessary sources to parse GPT image 205ifeq (${ARM_GPT_SUPPORT}, 1) 206 BL2_SOURCES += drivers/partition/gpt.c \ 207 drivers/partition/partition.c 208endif 209 210# Enable CRC instructions via extension for ARMv8-A CPUs. 211# For ARMv8.1-A, and onwards CRC instructions are default enabled. 212# Enable HW computed CRC support unconditionally in BL2 component. 213ifeq (${ARM_ARCH_MAJOR},8) 214 ifeq (${ARM_ARCH_MINOR},0) 215 BL2_CPPFLAGS += -march=armv8-a+crc 216 endif 217endif 218 219ifeq ($(PSA_FWU_SUPPORT),1) 220 # GPT support is recommended as per PSA FWU specification hence 221 # PSA FWU implementation is tightly coupled with GPT support, 222 # and it does not support other formats. 223 ifneq ($(ARM_GPT_SUPPORT),1) 224 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled) 225 endif 226 FWU_MK := drivers/fwu/fwu.mk 227 $(info Including ${FWU_MK}) 228 include ${FWU_MK} 229endif 230 231ifeq (${ARCH}, aarch64) 232PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 233endif 234 235PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 236 plat/arm/common/arm_common.c \ 237 plat/arm/common/arm_console.c 238 239ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 240PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 241 lib/xlat_tables/${ARCH}/xlat_tables.c 242else 243ifeq (${XLAT_MPU_LIB_V1}, 1) 244include lib/xlat_mpu/xlat_mpu.mk 245PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS} 246else 247include lib/xlat_tables_v2/xlat_tables.mk 248PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 249endif 250endif 251 252ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ 253 plat/arm/common/fconf/arm_fconf_io.c 254ifeq (${SPD},spmd) 255 ifeq (${BL2_ENABLE_SP_LOAD},1) 256 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c 257 endif 258endif 259 260BL1_SOURCES += drivers/io/io_fip.c \ 261 drivers/io/io_memmap.c \ 262 drivers/io/io_storage.c \ 263 plat/arm/common/arm_bl1_setup.c \ 264 plat/arm/common/arm_err.c \ 265 ${ARM_IO_SOURCES} 266 267ifdef EL3_PAYLOAD_BASE 268# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from 269# their holding pen 270BL1_SOURCES += plat/arm/common/arm_pm.c 271endif 272 273BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 274 drivers/delay_timer/generic_delay_timer.c \ 275 drivers/io/io_fip.c \ 276 drivers/io/io_memmap.c \ 277 drivers/io/io_storage.c \ 278 plat/arm/common/arm_bl2_setup.c \ 279 plat/arm/common/arm_err.c \ 280 common/tf_crc32.c \ 281 ${ARM_IO_SOURCES} 282 283# Firmware Configuration Framework sources 284include lib/fconf/fconf.mk 285 286BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 287BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 288 289# Add `libfdt` and Arm common helpers required for Dynamic Config 290include lib/libfdt/libfdt.mk 291 292DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 293 plat/arm/common/arm_dyn_cfg_helpers.c \ 294 common/uuid.c 295 296DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES} 297 298BL1_SOURCES += ${DYN_CFG_SOURCES} 299BL2_SOURCES += ${DYN_CFG_SOURCES} 300 301ifeq (${RESET_TO_BL2},1) 302BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c 303endif 304 305# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 306# the AArch32 descriptors. 307ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 308BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 309else 310ifneq (${PLAT}, corstone1000) 311BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 312endif 313endif 314BL2_SOURCES += plat/arm/common/arm_image_load.c \ 315 common/desc_image_load.c 316ifeq (${SPD},opteed) 317BL2_SOURCES += lib/optee/optee_utils.c 318endif 319 320BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 321 drivers/delay_timer/generic_delay_timer.c \ 322 plat/arm/common/arm_bl2u_setup.c 323 324BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 325 plat/arm/common/arm_pm.c \ 326 plat/arm/common/arm_topology.c \ 327 plat/common/plat_psci_common.c 328 329ifneq ($(filter 1,${ENABLE_PMF} ${ARM_ETHOSN_NPU_DRIVER}),) 330ARM_SVC_HANDLER_SRCS := 331 332ifeq (${ENABLE_PMF},1) 333ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c 334endif 335 336ifeq (${ARM_ETHOSN_NPU_DRIVER},1) 337ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \ 338 drivers/delay_timer/delay_timer.c \ 339 drivers/arm/ethosn/ethosn_smc.c 340endif 341 342ifeq (${ARCH}, aarch64) 343BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\ 344 plat/arm/common/arm_sip_svc.c \ 345 ${ARM_SVC_HANDLER_SRCS} 346else 347BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ 348 ${ARM_SVC_HANDLER_SRCS} 349endif 350endif 351 352ifeq (${EL3_EXCEPTION_HANDLING},1) 353BL31_SOURCES += plat/common/aarch64/plat_ehf.c 354endif 355 356ifeq (${SDEI_SUPPORT},1) 357BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 358ifeq (${SDEI_IN_FCONF},1) 359BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c 360endif 361endif 362 363# RAS sources 364ifeq (${RAS_EXTENSION},1) 365BL31_SOURCES += lib/extensions/ras/std_err_record.c \ 366 lib/extensions/ras/ras_common.c 367endif 368 369# Pointer Authentication sources 370ifeq (${ENABLE_PAUTH}, 1) 371PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c 372endif 373 374ifeq (${SPD},spmd) 375BL31_SOURCES += plat/common/plat_spmd_manifest.c \ 376 common/uuid.c \ 377 ${LIBFDT_SRCS} 378 379BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 380endif 381 382ifeq (${DRTM_SUPPORT},1) 383BL31_SOURCES += plat/arm/common/arm_err.c 384endif 385 386ifneq (${TRUSTED_BOARD_BOOT},0) 387 388 # Include common TBB sources 389 AUTH_SOURCES := drivers/auth/auth_mod.c \ 390 drivers/auth/img_parser_mod.c 391 392 # Include the selected chain of trust sources. 393 ifeq (${COT},tbbr) 394 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 395 drivers/auth/tbbr/tbbr_cot_bl1.c 396 ifneq (${COT_DESC_IN_DTB},0) 397 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 398 else 399 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 400 drivers/auth/tbbr/tbbr_cot_bl2.c 401 endif 402 else ifeq (${COT},dualroot) 403 AUTH_SOURCES += drivers/auth/dualroot/cot.c 404 else ifeq (${COT},cca) 405 AUTH_SOURCES += drivers/auth/cca/cot.c 406 else 407 $(error Unknown chain of trust ${COT}) 408 endif 409 410 BL1_SOURCES += ${AUTH_SOURCES} \ 411 bl1/tbbr/tbbr_img_desc.c \ 412 plat/arm/common/arm_bl1_fwu.c \ 413 plat/common/tbbr/plat_tbbr.c 414 415 BL2_SOURCES += ${AUTH_SOURCES} \ 416 plat/common/tbbr/plat_tbbr.c 417 418 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 419 420 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 421 422 $(info Including ${IMG_PARSER_LIB_MK}) 423 include ${IMG_PARSER_LIB_MK} 424endif 425 426# Include Measured Boot makefile before any Crypto library makefile. 427# Crypto library makefile may need default definitions of Measured Boot build 428# flags present in Measured Boot makefile. 429ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),) 430 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk 431 $(info Including ${MEASURED_BOOT_MK}) 432 include ${MEASURED_BOOT_MK} 433 434 ifneq (${MBOOT_EL_HASH_ALG}, sha256) 435 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512)) 436 endif 437 438 ifeq (${MEASURED_BOOT},1) 439 BL1_SOURCES += ${EVENT_LOG_SOURCES} 440 BL2_SOURCES += ${EVENT_LOG_SOURCES} 441 endif 442 443 ifeq (${DRTM_SUPPORT},1) 444 BL31_SOURCES += ${EVENT_LOG_SOURCES} 445 endif 446endif 447 448ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),) 449 CRYPTO_SOURCES := drivers/auth/crypto_mod.c \ 450 lib/fconf/fconf_tbbr_getter.c 451 BL1_SOURCES += ${CRYPTO_SOURCES} 452 BL2_SOURCES += ${CRYPTO_SOURCES} 453 BL31_SOURCES += drivers/auth/crypto_mod.c 454 455 # We expect to locate the *.mk files under the directories specified below 456 ifeq (${ARM_CRYPTOCELL_INTEG},0) 457 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 458 else 459 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk 460 endif 461 462 $(info Including ${CRYPTO_LIB_MK}) 463 include ${CRYPTO_LIB_MK} 464endif 465 466ifeq (${RECLAIM_INIT_CODE}, 1) 467 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 468 $(error "To reclaim init code xlat tables v2 must be used") 469 endif 470endif 471