1# 2# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are met: 6# 7# Redistributions of source code must retain the above copyright notice, this 8# list of conditions and the following disclaimer. 9# 10# Redistributions in binary form must reproduce the above copyright notice, 11# this list of conditions and the following disclaimer in the documentation 12# and/or other materials provided with the distribution. 13# 14# Neither the name of ARM nor the names of its contributors may be used 15# to endorse or promote products derived from this software without specific 16# prior written permission. 17# 18# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28# POSSIBILITY OF SUCH DAMAGE. 29# 30 31ifeq (${ARCH}, aarch64) 32 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 33 # DRAM (if available) or the TZC secured area of DRAM. 34 # Trusted SRAM is the default. 35 36 ARM_TSP_RAM_LOCATION := tsram 37 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 38 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 39 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 40 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 41 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 42 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 43 else 44 $(error "Unsupported ARM_TSP_RAM_LOCATION value") 45 endif 46 47 # Process flags 48 $(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 49 50 # Process ARM_BL31_IN_DRAM flag 51 ARM_BL31_IN_DRAM := 0 52 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 53 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 54endif 55 56# For the original power-state parameter format, the State-ID can be encoded 57# according to the recommended encoding or zero. This flag determines which 58# State-ID encoding to be parsed. 59ARM_RECOM_STATE_ID_ENC := 0 60 61# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 62# be set. Else throw a build error. 63ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 64 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 65 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 66 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 67 endif 68endif 69 70# Process ARM_RECOM_STATE_ID_ENC flag 71$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 72$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 73 74# Process ARM_DISABLE_TRUSTED_WDOG flag 75# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set 76ARM_DISABLE_TRUSTED_WDOG := 0 77ifeq (${SPIN_ON_BL1_EXIT}, 1) 78ARM_DISABLE_TRUSTED_WDOG := 1 79endif 80$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 81$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 82 83# Process ARM_CONFIG_CNTACR 84ARM_CONFIG_CNTACR := 1 85$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 86$(eval $(call add_define,ARM_CONFIG_CNTACR)) 87 88# Process ARM_BL31_IN_DRAM flag 89ARM_BL31_IN_DRAM := 0 90$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 91$(eval $(call add_define,ARM_BL31_IN_DRAM)) 92 93# Process ARM_PLAT_MT flag 94ARM_PLAT_MT := 0 95$(eval $(call assert_boolean,ARM_PLAT_MT)) 96$(eval $(call add_define,ARM_PLAT_MT)) 97 98# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 99ENABLE_PSCI_STAT := 1 100ENABLE_PMF := 1 101 102# On ARM platforms, separate the code and read-only data sections to allow 103# mapping the former as executable and the latter as execute-never. 104SEPARATE_CODE_AND_RODATA := 1 105 106# Enable new version of image loading on ARM platforms 107LOAD_IMAGE_V2 := 1 108 109PLAT_INCLUDES += -Iinclude/common/tbbr \ 110 -Iinclude/plat/arm/common 111 112ifeq (${ARCH}, aarch64) 113PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 114endif 115 116include lib/xlat_tables_v2/xlat_tables.mk 117 118PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} \ 119 plat/arm/common/${ARCH}/arm_helpers.S \ 120 plat/arm/common/arm_common.c 121 122BL1_SOURCES += drivers/arm/sp805/sp805.c \ 123 drivers/io/io_fip.c \ 124 drivers/io/io_memmap.c \ 125 drivers/io/io_storage.c \ 126 plat/arm/common/arm_bl1_setup.c \ 127 plat/arm/common/arm_io_storage.c 128ifdef EL3_PAYLOAD_BASE 129# Need the arm_program_trusted_mailbox() function to release secondary CPUs from 130# their holding pen 131BL1_SOURCES += plat/arm/common/arm_pm.c 132endif 133 134BL2_SOURCES += drivers/io/io_fip.c \ 135 drivers/io/io_memmap.c \ 136 drivers/io/io_storage.c \ 137 plat/arm/common/arm_bl2_setup.c \ 138 plat/arm/common/arm_io_storage.c 139ifeq (${LOAD_IMAGE_V2},1) 140# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 141# the AArch32 descriptors. 142ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 143BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 144else 145BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 146endif 147BL2_SOURCES += plat/arm/common/arm_image_load.c \ 148 common/desc_image_load.c 149endif 150 151BL2U_SOURCES += plat/arm/common/arm_bl2u_setup.c 152 153BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 154 plat/arm/common/arm_pm.c \ 155 plat/arm/common/arm_topology.c \ 156 plat/common/plat_psci_common.c 157 158ifeq (${ENABLE_PMF}, 1) 159BL31_SOURCES += plat/arm/common/arm_sip_svc.c \ 160 lib/pmf/pmf_smc.c 161endif 162 163ifneq (${TRUSTED_BOARD_BOOT},0) 164 165 # By default, ARM platforms use RSA keys 166 KEY_ALG := rsa 167 168 # Include common TBB sources 169 AUTH_SOURCES := drivers/auth/auth_mod.c \ 170 drivers/auth/crypto_mod.c \ 171 drivers/auth/img_parser_mod.c \ 172 drivers/auth/tbbr/tbbr_cot.c \ 173 174 PLAT_INCLUDES += -Iinclude/bl1/tbbr 175 176 BL1_SOURCES += ${AUTH_SOURCES} \ 177 bl1/tbbr/tbbr_img_desc.c \ 178 plat/arm/common/arm_bl1_fwu.c \ 179 plat/common/tbbr/plat_tbbr.c 180 181 BL2_SOURCES += ${AUTH_SOURCES} \ 182 plat/common/tbbr/plat_tbbr.c 183 184 $(eval $(call FWU_FIP_ADD_IMG,NS_BL2U,--fwu)) 185 186 MBEDTLS_KEY_ALG := ${KEY_ALG} 187 188 # We expect to locate the *.mk files under the directories specified below 189 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 190 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 191 192 $(info Including ${CRYPTO_LIB_MK}) 193 include ${CRYPTO_LIB_MK} 194 195 $(info Including ${IMG_PARSER_LIB_MK}) 196 include ${IMG_PARSER_LIB_MK} 197 198endif 199