1# 2# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7ifeq (${ARCH}, aarch64) 8 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 9 # DRAM (if available) or the TZC secured area of DRAM. 10 # Trusted SRAM is the default. 11 12 ARM_TSP_RAM_LOCATION := tsram 13 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 14 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 15 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 16 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 17 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 18 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 19 else 20 $(error "Unsupported ARM_TSP_RAM_LOCATION value") 21 endif 22 23 # Process flags 24 $(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 25 26 # Process ARM_BL31_IN_DRAM flag 27 ARM_BL31_IN_DRAM := 0 28 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 29 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 30endif 31 32# For the original power-state parameter format, the State-ID can be encoded 33# according to the recommended encoding or zero. This flag determines which 34# State-ID encoding to be parsed. 35ARM_RECOM_STATE_ID_ENC := 0 36 37# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 38# be set. Else throw a build error. 39ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 40 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 41 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 42 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 43 endif 44endif 45 46# Process ARM_RECOM_STATE_ID_ENC flag 47$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 48$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 49 50# Process ARM_DISABLE_TRUSTED_WDOG flag 51# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set 52ARM_DISABLE_TRUSTED_WDOG := 0 53ifeq (${SPIN_ON_BL1_EXIT}, 1) 54ARM_DISABLE_TRUSTED_WDOG := 1 55endif 56$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 57$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 58 59# Process ARM_CONFIG_CNTACR 60ARM_CONFIG_CNTACR := 1 61$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 62$(eval $(call add_define,ARM_CONFIG_CNTACR)) 63 64# Process ARM_BL31_IN_DRAM flag 65ARM_BL31_IN_DRAM := 0 66$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 67$(eval $(call add_define,ARM_BL31_IN_DRAM)) 68 69# Process ARM_PLAT_MT flag 70ARM_PLAT_MT := 0 71$(eval $(call assert_boolean,ARM_PLAT_MT)) 72$(eval $(call add_define,ARM_PLAT_MT)) 73 74# Use translation tables library v2 by default 75ARM_XLAT_TABLES_LIB_V1 := 0 76$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 77$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 78 79# Use an implementation of SHA-256 with a smaller memory footprint but reduced 80# speed. 81$(eval $(call add_define,MBEDTLS_SHA256_SMALLER)) 82 83# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 84ENABLE_PSCI_STAT := 1 85ENABLE_PMF := 1 86 87# On ARM platforms, separate the code and read-only data sections to allow 88# mapping the former as executable and the latter as execute-never. 89SEPARATE_CODE_AND_RODATA := 1 90 91# Enable new version of image loading on ARM platforms 92LOAD_IMAGE_V2 := 1 93 94# Use generic OID definition (tbbr_oid.h) 95USE_TBBR_DEFS := 1 96 97PLAT_INCLUDES += -Iinclude/common/tbbr \ 98 -Iinclude/plat/arm/common 99 100ifeq (${ARCH}, aarch64) 101PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 102endif 103 104PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 105 plat/arm/common/arm_common.c 106 107ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 108PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 109 lib/xlat_tables/${ARCH}/xlat_tables.c 110else 111include lib/xlat_tables_v2/xlat_tables.mk 112 113PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 114endif 115 116BL1_SOURCES += drivers/arm/sp805/sp805.c \ 117 drivers/io/io_fip.c \ 118 drivers/io/io_memmap.c \ 119 drivers/io/io_storage.c \ 120 plat/arm/common/arm_bl1_setup.c \ 121 plat/arm/common/arm_io_storage.c 122ifdef EL3_PAYLOAD_BASE 123# Need the arm_program_trusted_mailbox() function to release secondary CPUs from 124# their holding pen 125BL1_SOURCES += plat/arm/common/arm_pm.c 126endif 127 128BL2_SOURCES += drivers/io/io_fip.c \ 129 drivers/io/io_memmap.c \ 130 drivers/io/io_storage.c \ 131 plat/arm/common/arm_bl2_setup.c \ 132 plat/arm/common/arm_io_storage.c 133ifeq (${LOAD_IMAGE_V2},1) 134# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 135# the AArch32 descriptors. 136ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 137BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 138else 139BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 140endif 141BL2_SOURCES += plat/arm/common/arm_image_load.c \ 142 common/desc_image_load.c 143endif 144 145BL2U_SOURCES += plat/arm/common/arm_bl2u_setup.c 146 147BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 148 plat/arm/common/arm_pm.c \ 149 plat/arm/common/arm_topology.c \ 150 plat/arm/common/execution_state_switch.c \ 151 plat/common/plat_psci_common.c 152 153ifeq (${ENABLE_PMF}, 1) 154BL31_SOURCES += plat/arm/common/arm_sip_svc.c \ 155 lib/pmf/pmf_smc.c 156endif 157 158ifneq (${TRUSTED_BOARD_BOOT},0) 159 160 # By default, ARM platforms use RSA keys 161 KEY_ALG := rsa 162 163 # Include common TBB sources 164 AUTH_SOURCES := drivers/auth/auth_mod.c \ 165 drivers/auth/crypto_mod.c \ 166 drivers/auth/img_parser_mod.c \ 167 drivers/auth/tbbr/tbbr_cot.c \ 168 169 PLAT_INCLUDES += -Iinclude/bl1/tbbr 170 171 BL1_SOURCES += ${AUTH_SOURCES} \ 172 bl1/tbbr/tbbr_img_desc.c \ 173 plat/arm/common/arm_bl1_fwu.c \ 174 plat/common/tbbr/plat_tbbr.c 175 176 BL2_SOURCES += ${AUTH_SOURCES} \ 177 plat/common/tbbr/plat_tbbr.c 178 179 $(eval $(call FWU_FIP_ADD_IMG,NS_BL2U,--fwu)) 180 181 TF_MBEDTLS_KEY_ALG := ${KEY_ALG} 182 183 # We expect to locate the *.mk files under the directories specified below 184 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 185 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 186 187 $(info Including ${CRYPTO_LIB_MK}) 188 include ${CRYPTO_LIB_MK} 189 190 $(info Including ${IMG_PARSER_LIB_MK}) 191 include ${IMG_PARSER_LIB_MK} 192 193endif 194