1# 2# Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9ifeq (${ARCH},aarch32) 10 ifeq (${AARCH32_SP},none) 11 $(error Variable AARCH32_SP has to be set for AArch32) 12 endif 13endif 14 15ifeq (${ARCH}, aarch64) 16 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 17 # DRAM (if available) or the TZC secured area of DRAM. 18 # TZC secured DRAM is the default. 19 20 ARM_TSP_RAM_LOCATION ?= dram 21 22 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 23 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 24 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 25 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 26 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 27 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 28 else 29 $(error Unsupported ARM_TSP_RAM_LOCATION value) 30 endif 31 32 # Process flags 33 # Process ARM_BL31_IN_DRAM flag 34 ARM_BL31_IN_DRAM := 0 35 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 36 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 37else 38 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 39endif 40 41$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 42 43 44# For the original power-state parameter format, the State-ID can be encoded 45# according to the recommended encoding or zero. This flag determines which 46# State-ID encoding to be parsed. 47ARM_RECOM_STATE_ID_ENC := 0 48 49# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 50# be set. Else throw a build error. 51ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 52 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 53 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 54 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 55 endif 56endif 57 58# Process ARM_RECOM_STATE_ID_ENC flag 59$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 60$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 61 62# Process ARM_DISABLE_TRUSTED_WDOG flag 63# By default, Trusted Watchdog is always enabled unless 64# SPIN_ON_BL1_EXIT or ENABLE_RME is set 65ARM_DISABLE_TRUSTED_WDOG := 0 66ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),) 67ARM_DISABLE_TRUSTED_WDOG := 1 68endif 69$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 70$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 71 72# Process ARM_CONFIG_CNTACR 73ARM_CONFIG_CNTACR := 1 74$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 75$(eval $(call add_define,ARM_CONFIG_CNTACR)) 76 77# Process ARM_BL31_IN_DRAM flag 78ARM_BL31_IN_DRAM := 0 79$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 80$(eval $(call add_define,ARM_BL31_IN_DRAM)) 81 82# Macro to enable ACS SMC handler 83PLAT_ARM_ACS_SMC_HANDLER := 0 84ifeq (${ENABLE_ACS_SMC}, 1) 85PLAT_ARM_ACS_SMC_HANDLER := 1 86endif 87 88# Build macro necessary for branching to ACS tests 89$(eval $(call add_define,PLAT_ARM_ACS_SMC_HANDLER)) 90 91# As per CCA security model, all root firmware must execute from on-chip secure 92# memory. This means we must not run BL31 from TZC-protected DRAM. 93ifeq (${ARM_BL31_IN_DRAM},1) 94 ifeq (${ENABLE_RME},1) 95 $(error BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0) 96 endif 97endif 98 99# Process ARM_PLAT_MT flag 100ARM_PLAT_MT := 0 101$(eval $(call assert_boolean,ARM_PLAT_MT)) 102$(eval $(call add_define,ARM_PLAT_MT)) 103 104# Use translation tables library v2 by default 105ARM_XLAT_TABLES_LIB_V1 := 0 106$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 107$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 108 109# Don't have the Linux kernel as a BL33 image by default 110ARM_LINUX_KERNEL_AS_BL33 := 0 111$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 112$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 113 114ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) 115 USE_KERNEL_DT_CONVENTION := 1 116 117 ifneq (${ARCH},aarch64) 118 ifneq (${RESET_TO_SP_MIN},1) 119 $(error ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.) 120 endif 121 endif 122 ifndef HW_CONFIG_BASE 123 ifndef ARM_PRELOADED_DTB_BASE 124 $(error If ARM_LINUX_KERNEL_AS_BL33 is used, either HW_CONFIG_BASE or \ 125 ARM_PRELOADED_DTB_BASE must be set. ) 126 endif 127 128 HW_CONFIG_BASE := ${ARM_PRELOADED_DTB_BASE} 129 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 130 endif 131endif 132 133# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 134# in the FIP if the platform requires. 135ifneq ($(BL32_EXTRA1),) 136ifneq (${DECRYPTION_SUPPORT},none) 137$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1,,$(ENCRYPT_BL32))) 138else 139$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 140endif 141endif 142ifneq ($(BL32_EXTRA2),) 143ifneq (${DECRYPTION_SUPPORT},none) 144$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2,,$(ENCRYPT_BL32))) 145else 146$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 147endif 148endif 149 150# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 151ENABLE_PSCI_STAT := 1 152ENABLE_PMF := 1 153 154# Override the standard libc with optimised libc_asm 155OVERRIDE_LIBC := 1 156ifeq (${OVERRIDE_LIBC},1) 157 include lib/libc/libc_asm.mk 158endif 159 160# On ARM platforms, separate the code and read-only data sections to allow 161# mapping the former as executable and the latter as execute-never. 162SEPARATE_CODE_AND_RODATA := 1 163 164# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS 165# and NOBITS sections of BL31 image are adjacent to each other and loaded 166# into Trusted SRAM. 167SEPARATE_NOBITS_REGION := 0 168 169# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load 170# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate 171# the build to require that ARM_BL31_IN_DRAM is enabled as well. 172ifeq ($(SEPARATE_NOBITS_REGION),1) 173 ifneq ($(ARM_BL31_IN_DRAM),1) 174 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) 175 endif 176 ifneq ($(RECLAIM_INIT_CODE),0) 177 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) 178 endif 179endif 180 181# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case 182ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 183 ENABLE_PIE := 1 184endif 185 186# On Arm platform, disable ARM_FW_CONFIG_LOAD_ENABLE by default. 187ARM_FW_CONFIG_LOAD_ENABLE := 0 188$(eval $(call assert_boolean,ARM_FW_CONFIG_LOAD_ENABLE)) 189$(eval $(call add_define,ARM_FW_CONFIG_LOAD_ENABLE)) 190 191# In order to enable ARM_FW_CONFIG_LOAD_ENABLE for the Arm platform, the 192# platform should be reset to BL2 (RESET_TO_BL2=1), and FW_CONFIG must be 193# specified. 194ifeq (${ARM_FW_CONFIG_LOAD_ENABLE},1) 195 ifneq (${RESET_TO_BL2},1) 196 $(error RESET_TO_BL2 must be enabled when ARM_FW_CONFIG_LOAD_ENABLE \ 197 is enabled) 198 endif 199 ifeq (${FW_CONFIG},) 200 $(error FW_CONFIG must be specified when ARM_FW_CONFIG_LOAD_ENABLE \ 201 is enabled) 202 endif 203endif 204 205# Disable GPT parser support, use FIP image by default 206ARM_GPT_SUPPORT := 0 207$(eval $(call assert_boolean,ARM_GPT_SUPPORT)) 208$(eval $(call add_define,ARM_GPT_SUPPORT)) 209 210# Include necessary sources to parse GPT image 211ifeq (${ARM_GPT_SUPPORT}, 1) 212 BL2_SOURCES += drivers/partition/gpt.c \ 213 drivers/partition/partition.c 214endif 215 216ifeq ($(PSA_FWU_SUPPORT),1) 217 # GPT support is recommended as per PSA FWU specification hence 218 # PSA FWU implementation is tightly coupled with GPT support, 219 # and it does not support other formats. 220 ifneq ($(ARM_GPT_SUPPORT),1) 221 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled) 222 endif 223 FWU_MK := drivers/fwu/fwu.mk 224 $(info Including ${FWU_MK}) 225 include ${FWU_MK} 226endif 227 228ifeq (${ARCH}, aarch64) 229PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 230endif 231 232PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 233 plat/arm/common/arm_common.c \ 234 plat/arm/common/arm_console.c 235 236ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 237PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 238 lib/xlat_tables/${ARCH}/xlat_tables.c 239else 240include lib/xlat_tables_v2/xlat_tables.mk 241PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 242endif 243 244ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ 245 plat/arm/common/fconf/arm_fconf_io.c 246ifeq (${SPD},spmd) 247 ifeq (${BL2_ENABLE_SP_LOAD},1) 248 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c 249 endif 250endif 251 252BL1_SOURCES += drivers/io/io_fip.c \ 253 drivers/io/io_memmap.c \ 254 drivers/io/io_storage.c \ 255 plat/arm/common/arm_bl1_setup.c \ 256 plat/arm/common/arm_err.c \ 257 ${ARM_IO_SOURCES} 258 259ifdef EL3_PAYLOAD_BASE 260# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from 261# their holding pen 262BL1_SOURCES += plat/arm/common/arm_pm.c 263endif 264 265BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 266 drivers/delay_timer/generic_delay_timer.c \ 267 drivers/io/io_fip.c \ 268 drivers/io/io_memmap.c \ 269 drivers/io/io_storage.c \ 270 plat/arm/common/arm_bl2_setup.c \ 271 plat/arm/common/arm_err.c \ 272 common/tf_crc32.c \ 273 ${ARM_IO_SOURCES} 274 275# Firmware Configuration Framework sources 276include lib/fconf/fconf.mk 277 278BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 279BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 280 281# Add `libfdt` and Arm common helpers required for Dynamic Config 282include lib/libfdt/libfdt.mk 283 284DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 285 plat/arm/common/arm_dyn_cfg_helpers.c \ 286 common/uuid.c 287 288DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES} 289 290BL1_SOURCES += ${DYN_CFG_SOURCES} 291BL2_SOURCES += ${DYN_CFG_SOURCES} 292 293# The Arm platforms use the default BL2 mem params desc. 294ARM_PLAT_PROVIDES_BL2_MEM_PARAMS := 0 295 296# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 297# the AArch32 descriptors. 298ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 299BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 300else 301ifeq ($(ARM_PLAT_PROVIDES_BL2_MEM_PARAMS),0) 302BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 303endif 304endif 305BL2_SOURCES += plat/arm/common/arm_image_load.c \ 306 common/desc_image_load.c 307ifeq (${SPD},opteed) 308BL2_SOURCES += lib/optee/optee_utils.c 309endif 310 311BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 312 drivers/delay_timer/generic_delay_timer.c \ 313 plat/arm/common/arm_bl2u_setup.c 314 315BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 316 plat/arm/common/arm_pm.c \ 317 plat/arm/common/arm_topology.c \ 318 plat/common/plat_psci_common.c 319 320ifeq (${PLAT_ARM_ACS_SMC_HANDLER},1) 321BL31_SOURCES += plat/arm/common/plat_acs_smc_handler.c \ 322 ${VENDOR_EL3_SRCS} 323endif 324 325ifeq (${TRANSFER_LIST}, 1) 326include lib/transfer_list/transfer_list.mk 327 328BL1_SOURCES += plat/arm/common/arm_transfer_list.c 329BL2_SOURCES += plat/arm/common/arm_transfer_list.c 330BL31_SOURCES += plat/arm/common/arm_transfer_list.c 331endif 332 333ifneq (${DECRYPTION_SUPPORT},none) 334BL1_SOURCES += drivers/io/io_encrypted.c 335BL2_SOURCES += drivers/io/io_encrypted.c 336endif 337 338ifneq ($(filter 1,${ENABLE_PMF} ${ETHOSN_NPU_DRIVER}),) 339ARM_SVC_HANDLER_SRCS := 340 341ifeq (${ENABLE_PMF},1) 342ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c 343endif 344 345ifeq (${ETHOSN_NPU_DRIVER},1) 346ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \ 347 drivers/delay_timer/delay_timer.c \ 348 drivers/arm/ethosn/ethosn_smc.c 349ifeq (${ETHOSN_NPU_TZMP1},1) 350ARM_SVC_HANDLER_SRCS += drivers/arm/ethosn/ethosn_big_fw.c 351endif 352endif 353 354ifeq (${ARCH}, aarch64) 355BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\ 356 plat/arm/common/arm_sip_svc.c \ 357 plat/arm/common/plat_arm_sip_svc.c \ 358 ${ARM_SVC_HANDLER_SRCS} 359else 360BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ 361 plat/arm/common/plat_arm_sip_svc.c \ 362 ${ARM_SVC_HANDLER_SRCS} 363endif 364endif 365 366ifeq (${EL3_EXCEPTION_HANDLING},1) 367BL31_SOURCES += plat/common/aarch64/plat_ehf.c 368endif 369 370ifeq (${SDEI_SUPPORT},1) 371BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 372ifeq (${SDEI_IN_FCONF},1) 373BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c 374endif 375endif 376 377# Pointer Authentication sources 378ifeq ($(BRANCH_PROTECTION),$(filter $(BRANCH_PROTECTION),1 2 3 5)) 379PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c 380endif 381 382ifeq (${SPD},spmd) 383BL31_SOURCES += plat/common/plat_spmd_manifest.c \ 384 common/uuid.c \ 385 ${LIBFDT_SRCS} 386 387BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 388endif 389 390ifeq (${DRTM_SUPPORT},1) 391BL31_SOURCES += plat/arm/common/arm_err.c 392endif 393 394ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),) 395 PLAT_INCLUDES += -Iplat/arm/common \ 396 -Iinclude/drivers/auth/mbedtls 397 ifeq (${HASH_ALG}, sha512) 398 ARM_ROTPK_HASH_LEN := 64 399 else ifeq (${HASH_ALG}, sha384) 400 ARM_ROTPK_HASH_LEN := 48 401 else 402 ARM_ROTPK_HASH_LEN := 32 403 endif 404 $(eval $(call add_define,ARM_ROTPK_HASH_LEN)) 405endif 406 407ifneq (${TRUSTED_BOARD_BOOT},0) 408 409 # Include common TBB sources 410 AUTH_MK := drivers/auth/auth.mk 411 $(info Including ${AUTH_MK}) 412 include ${AUTH_MK} 413 414 # Include the selected chain of trust sources. 415 ifeq (${COT},tbbr) 416 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 417 drivers/auth/tbbr/tbbr_cot_bl1.c 418 ifneq (${COT_DESC_IN_DTB},0) 419 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 420 else 421 # Juno has its own TBBR CoT file for BL2 422 ifeq (${PLAT},juno) 423 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c 424 endif 425 endif 426 else ifeq (${COT},dualroot) 427 BL1_SOURCES += drivers/auth/dualroot/bl1_cot.c 428 ifneq (${COT_DESC_IN_DTB},0) 429 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 430 endif 431 else ifeq (${COT},cca) 432 BL1_SOURCES += drivers/auth/cca/bl1_cot.c 433 ifneq (${COT_DESC_IN_DTB},0) 434 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 435 endif 436 else 437 $(error Unknown chain of trust ${COT}) 438 endif 439 440 ifeq (${COT_DESC_IN_DTB},0) 441 ifeq (${COT},dualroot) 442 COTDTPATH := fdts/dualroot_cot_descriptors.dts 443 else ifeq (${COT},cca) 444 COTDTPATH := fdts/cca_cot_descriptors.dts 445 else ifeq (${COT},tbbr) 446 ifneq (${PLAT},juno) 447 COTDTPATH := fdts/tbbr_cot_descriptors.dts 448 endif 449 endif 450 endif 451 452 BL1_SOURCES += ${AUTH_SOURCES} \ 453 bl1/tbbr/tbbr_img_desc.c \ 454 plat/arm/common/arm_bl1_fwu.c \ 455 plat/common/tbbr/plat_tbbr.c 456 457 BL2_SOURCES += ${AUTH_SOURCES} \ 458 plat/common/tbbr/plat_tbbr.c 459 460 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 461 462 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 463 464 $(info Including ${IMG_PARSER_LIB_MK}) 465 include ${IMG_PARSER_LIB_MK} 466endif 467 468# Include Measured Boot makefile before any Crypto library makefile. 469# Crypto library makefile may need default definitions of Measured Boot build 470# flags present in Measured Boot makefile. 471ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),) 472 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk 473 $(info Including ${MEASURED_BOOT_MK}) 474 include ${MEASURED_BOOT_MK} 475 476 BL1_LIBS += $(LIBEVLOG_LIBS) 477 BL1_INCLUDE_DIRS += $(LIBEVLOG_INCLUDE_DIRS) 478 479 BL2_LIBS += $(LIBEVLOG_LIBS) 480 BL2_INCLUDE_DIRS += $(LIBEVLOG_INCLUDE_DIRS) 481 482 ifeq (${MEASURED_BOOT},1) 483 ifeq (${SPD_tspd},1) 484 BL32_LIBS += $(LIBEVLOG_LIBS) 485 BL32_INCLUDE_DIRS += $(LIBEVLOG_INCLUDE_DIRS) 486 endif 487 endif 488 489 ifeq (${DRTM_SUPPORT},1) 490 BL31_LIBS += $(LIBEVLOG_LIBS) 491 BL31_INCLUDE_DIRS += $(LIBEVLOG_INCLUDE_DIRS) 492 endif 493endif 494 495ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),) 496ifeq (${TRUSTED_BOARD_BOOT},0) 497 CRYPTO_SOURCES := drivers/auth/crypto_mod.c 498 BL1_SOURCES += ${CRYPTO_SOURCES} 499 BL2_SOURCES += ${CRYPTO_SOURCES} 500endif 501endif 502 503ifeq (${DRTM_SUPPORT},1) 504 BL31_SOURCES += drivers/auth/crypto_mod.c 505endif 506 507ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),) 508 FCONF_TBB_SOURCES := lib/fconf/fconf_tbbr_getter.c 509 BL1_SOURCES += ${FCONF_TBB_SOURCES} 510 BL2_SOURCES += ${FCONF_TBB_SOURCES} 511 512 # We expect to locate the *.mk files under the directories specified below 513 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 514 515 $(info Including ${CRYPTO_LIB_MK}) 516 include ${CRYPTO_LIB_MK} 517endif 518 519ifeq (${RECLAIM_INIT_CODE}, 1) 520 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 521 $(error To reclaim init code xlat tables v2 must be used) 522 endif 523endif 524 525ifneq ($(COTDTPATH),) 526 # no custom flags 527 $(eval $(call MAKE_PRE,$(BUILD_PLAT)/$(COTDTPATH),$(COTDTPATH),$(BUILD_PLAT)/$(COTDTPATH:.dts=.o.d))) 528 529 $(BUILD_PLAT)/$(COTDTPATH:.dts=.c): $(BUILD_PLAT)/$(COTDTPATH) | $$(@D)/ 530 $(if $(host-poetry),$(q)poetry -q install --no-root) 531 $(q)$(if $(host-poetry),poetry run )cot-dt2c convert-to-c $< $@ 532 533 BL2_SOURCES += $(BUILD_PLAT)/$(COTDTPATH:.dts=.c) 534endif 535