1# 2# Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7ifeq (${ARCH}, aarch64) 8 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 9 # DRAM (if available) or the TZC secured area of DRAM. 10 # TZC secured DRAM is the default. 11 12 ARM_TSP_RAM_LOCATION ?= dram 13 14 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 15 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 16 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 17 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 18 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 19 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 20 else 21 $(error "Unsupported ARM_TSP_RAM_LOCATION value") 22 endif 23 24 # Process flags 25 # Process ARM_BL31_IN_DRAM flag 26 ARM_BL31_IN_DRAM := 0 27 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 28 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 29else 30 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 31endif 32 33$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 34 35 36# For the original power-state parameter format, the State-ID can be encoded 37# according to the recommended encoding or zero. This flag determines which 38# State-ID encoding to be parsed. 39ARM_RECOM_STATE_ID_ENC := 0 40 41# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 42# be set. Else throw a build error. 43ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 44 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 45 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 46 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 47 endif 48endif 49 50# Process ARM_RECOM_STATE_ID_ENC flag 51$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 52$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 53 54# Process ARM_DISABLE_TRUSTED_WDOG flag 55# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set 56ARM_DISABLE_TRUSTED_WDOG := 0 57ifeq (${SPIN_ON_BL1_EXIT}, 1) 58ARM_DISABLE_TRUSTED_WDOG := 1 59endif 60$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 61$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 62 63# Process ARM_CONFIG_CNTACR 64ARM_CONFIG_CNTACR := 1 65$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 66$(eval $(call add_define,ARM_CONFIG_CNTACR)) 67 68# Process ARM_BL31_IN_DRAM flag 69ARM_BL31_IN_DRAM := 0 70$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 71$(eval $(call add_define,ARM_BL31_IN_DRAM)) 72 73# Process ARM_PLAT_MT flag 74ARM_PLAT_MT := 0 75$(eval $(call assert_boolean,ARM_PLAT_MT)) 76$(eval $(call add_define,ARM_PLAT_MT)) 77 78# Use translation tables library v2 by default 79ARM_XLAT_TABLES_LIB_V1 := 0 80$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 81$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 82 83# Don't have the Linux kernel as a BL33 image by default 84ARM_LINUX_KERNEL_AS_BL33 := 0 85$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 86$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 87 88ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) 89 ifneq (${ARCH},aarch64) 90 ifneq (${RESET_TO_SP_MIN},1) 91 $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.") 92 endif 93 endif 94 ifndef PRELOADED_BL33_BASE 95 $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.") 96 endif 97 ifeq (${RESET_TO_BL31},1) 98 ifndef ARM_PRELOADED_DTB_BASE 99 $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is 100 used with RESET_TO_BL31.") 101 endif 102 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 103 endif 104endif 105 106# Arm Ethos-N NPU SiP service 107ARM_ETHOSN_NPU_DRIVER := 0 108$(eval $(call assert_boolean,ARM_ETHOSN_NPU_DRIVER)) 109$(eval $(call add_define,ARM_ETHOSN_NPU_DRIVER)) 110 111# Use an implementation of SHA-256 with a smaller memory footprint but reduced 112# speed. 113$(eval $(call add_define,MBEDTLS_SHA256_SMALLER)) 114 115# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 116# in the FIP if the platform requires. 117ifneq ($(BL32_EXTRA1),) 118$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 119endif 120ifneq ($(BL32_EXTRA2),) 121$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 122endif 123 124# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 125ENABLE_PSCI_STAT := 1 126ENABLE_PMF := 1 127 128# Override the standard libc with optimised libc_asm 129OVERRIDE_LIBC := 1 130ifeq (${OVERRIDE_LIBC},1) 131 include lib/libc/libc_asm.mk 132endif 133 134# On ARM platforms, separate the code and read-only data sections to allow 135# mapping the former as executable and the latter as execute-never. 136SEPARATE_CODE_AND_RODATA := 1 137 138# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS 139# and NOBITS sections of BL31 image are adjacent to each other and loaded 140# into Trusted SRAM. 141SEPARATE_NOBITS_REGION := 0 142 143# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load 144# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate 145# the build to require that ARM_BL31_IN_DRAM is enabled as well. 146ifeq ($(SEPARATE_NOBITS_REGION),1) 147 ifneq ($(ARM_BL31_IN_DRAM),1) 148 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) 149 endif 150 ifneq ($(RECLAIM_INIT_CODE),0) 151 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) 152 endif 153endif 154 155# Disable ARM Cryptocell by default 156ARM_CRYPTOCELL_INTEG := 0 157$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG)) 158$(eval $(call add_define,ARM_CRYPTOCELL_INTEG)) 159 160# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case 161ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 162 ENABLE_PIE := 1 163endif 164 165# CryptoCell integration relies on coherent buffers for passing data from 166# the AP CPU to the CryptoCell 167ifeq (${ARM_CRYPTOCELL_INTEG},1) 168 ifeq (${USE_COHERENT_MEM},0) 169 $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.") 170 endif 171endif 172 173# Disable GPT parser support, use FIP image by default 174ARM_GPT_SUPPORT := 0 175$(eval $(call assert_boolean,ARM_GPT_SUPPORT)) 176$(eval $(call add_define,ARM_GPT_SUPPORT)) 177 178# Include necessary sources to parse GPT image 179ifeq (${ARM_GPT_SUPPORT}, 1) 180 BL2_SOURCES += drivers/partition/gpt.c \ 181 drivers/partition/partition.c 182endif 183 184# Enable CRC instructions via extension for ARMv8-A CPUs. 185# For ARMv8.1-A, and onwards CRC instructions are default enabled. 186# Enable HW computed CRC support unconditionally in BL2 component. 187ifeq (${ARM_ARCH_MINOR},0) 188 BL2_CPPFLAGS += -march=armv8-a+crc 189endif 190 191ifeq ($(PSA_FWU_SUPPORT),1) 192 # GPT support is recommended as per PSA FWU specification hence 193 # PSA FWU implementation is tightly coupled with GPT support, 194 # and it does not support other formats. 195 ifneq ($(ARM_GPT_SUPPORT),1) 196 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled) 197 endif 198 FWU_MK := drivers/fwu/fwu.mk 199 $(info Including ${FWU_MK}) 200 include ${FWU_MK} 201endif 202 203ifeq (${ARCH}, aarch64) 204PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 205endif 206 207PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 208 plat/arm/common/arm_common.c \ 209 plat/arm/common/arm_console.c 210 211ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 212PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 213 lib/xlat_tables/${ARCH}/xlat_tables.c 214else 215ifeq (${XLAT_MPU_LIB_V1}, 1) 216include lib/xlat_mpu/xlat_mpu.mk 217PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS} 218else 219include lib/xlat_tables_v2/xlat_tables.mk 220PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 221endif 222endif 223 224ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ 225 plat/arm/common/fconf/arm_fconf_io.c 226ifeq (${SPD},spmd) 227 ifeq (${BL2_ENABLE_SP_LOAD},1) 228 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c 229 endif 230endif 231 232BL1_SOURCES += drivers/io/io_fip.c \ 233 drivers/io/io_memmap.c \ 234 drivers/io/io_storage.c \ 235 plat/arm/common/arm_bl1_setup.c \ 236 plat/arm/common/arm_err.c \ 237 ${ARM_IO_SOURCES} 238 239ifdef EL3_PAYLOAD_BASE 240# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from 241# their holding pen 242BL1_SOURCES += plat/arm/common/arm_pm.c 243endif 244 245BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 246 drivers/delay_timer/generic_delay_timer.c \ 247 drivers/io/io_fip.c \ 248 drivers/io/io_memmap.c \ 249 drivers/io/io_storage.c \ 250 plat/arm/common/arm_bl2_setup.c \ 251 plat/arm/common/arm_err.c \ 252 common/tf_crc32.c \ 253 ${ARM_IO_SOURCES} 254 255# Firmware Configuration Framework sources 256include lib/fconf/fconf.mk 257 258# Add `libfdt` and Arm common helpers required for Dynamic Config 259include lib/libfdt/libfdt.mk 260 261DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 262 plat/arm/common/arm_dyn_cfg_helpers.c \ 263 common/fdt_wrappers.c \ 264 common/uuid.c 265 266BL1_SOURCES += ${DYN_CFG_SOURCES} 267BL2_SOURCES += ${DYN_CFG_SOURCES} 268 269ifeq (${BL2_AT_EL3},1) 270BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c 271endif 272 273# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 274# the AArch32 descriptors. 275ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 276BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 277else 278ifeq ($(filter ${TARGET_PLATFORM}, fpga fvp),) 279BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 280endif 281endif 282BL2_SOURCES += plat/arm/common/arm_image_load.c \ 283 common/desc_image_load.c 284ifeq (${SPD},opteed) 285BL2_SOURCES += lib/optee/optee_utils.c 286endif 287 288BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 289 drivers/delay_timer/generic_delay_timer.c \ 290 plat/arm/common/arm_bl2u_setup.c 291 292BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 293 plat/arm/common/arm_pm.c \ 294 plat/arm/common/arm_topology.c \ 295 plat/common/plat_psci_common.c 296 297ifneq ($(filter 1,${ENABLE_PMF} ${ARM_ETHOSN_NPU_DRIVER}),) 298ARM_SVC_HANDLER_SRCS := 299 300ifeq (${ENABLE_PMF},1) 301ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c 302endif 303 304ifeq (${ARM_ETHOSN_NPU_DRIVER},1) 305ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \ 306 drivers/delay_timer/delay_timer.c \ 307 drivers/arm/ethosn/ethosn_smc.c 308endif 309 310ifeq (${ARCH}, aarch64) 311BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\ 312 plat/arm/common/arm_sip_svc.c \ 313 ${ARM_SVC_HANDLER_SRCS} 314else 315BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ 316 ${ARM_SVC_HANDLER_SRCS} 317endif 318endif 319 320ifeq (${EL3_EXCEPTION_HANDLING},1) 321BL31_SOURCES += plat/common/aarch64/plat_ehf.c 322endif 323 324ifeq (${SDEI_SUPPORT},1) 325BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 326ifeq (${SDEI_IN_FCONF},1) 327BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c 328endif 329endif 330 331# RAS sources 332ifeq (${RAS_EXTENSION},1) 333BL31_SOURCES += lib/extensions/ras/std_err_record.c \ 334 lib/extensions/ras/ras_common.c 335endif 336 337# Pointer Authentication sources 338ifeq (${ENABLE_PAUTH}, 1) 339PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c \ 340 lib/extensions/pauth/pauth_helpers.S 341endif 342 343ifeq (${SPD},spmd) 344BL31_SOURCES += plat/common/plat_spmd_manifest.c \ 345 common/fdt_wrappers.c \ 346 common/uuid.c \ 347 ${LIBFDT_SRCS} 348 349endif 350 351ifneq (${TRUSTED_BOARD_BOOT},0) 352 353 # Include common TBB sources 354 AUTH_SOURCES := drivers/auth/auth_mod.c \ 355 drivers/auth/crypto_mod.c \ 356 drivers/auth/img_parser_mod.c \ 357 lib/fconf/fconf_tbbr_getter.c 358 359 # Include the selected chain of trust sources. 360 ifeq (${COT},tbbr) 361 ifeq (${PLAT},fvp_r) 362 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 363 drivers/auth/tbbr/tbbr_cot_bl1_r64.c 364 else 365 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 366 drivers/auth/tbbr/tbbr_cot_bl1.c 367 endif 368 ifneq (${COT_DESC_IN_DTB},0) 369 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 370 else 371 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 372 drivers/auth/tbbr/tbbr_cot_bl2.c 373 endif 374 else ifeq (${COT},dualroot) 375 AUTH_SOURCES += drivers/auth/dualroot/cot.c 376 else 377 $(error Unknown chain of trust ${COT}) 378 endif 379 380 BL1_SOURCES += ${AUTH_SOURCES} \ 381 bl1/tbbr/tbbr_img_desc.c \ 382 plat/arm/common/arm_bl1_fwu.c \ 383 plat/common/tbbr/plat_tbbr.c 384 385 BL2_SOURCES += ${AUTH_SOURCES} \ 386 plat/common/tbbr/plat_tbbr.c 387 388 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 389 390 # We expect to locate the *.mk files under the directories specified below 391ifeq (${ARM_CRYPTOCELL_INTEG},0) 392 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 393else 394 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk 395endif 396 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 397 398 $(info Including ${CRYPTO_LIB_MK}) 399 include ${CRYPTO_LIB_MK} 400 401 $(info Including ${IMG_PARSER_LIB_MK}) 402 include ${IMG_PARSER_LIB_MK} 403 404endif 405 406ifeq (${RECLAIM_INIT_CODE}, 1) 407 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 408 $(error "To reclaim init code xlat tables v2 must be used") 409 endif 410endif 411 412ifeq (${MEASURED_BOOT},1) 413 MEASURED_BOOT_MK := drivers/measured_boot/measured_boot.mk 414 $(info Including ${MEASURED_BOOT_MK}) 415 include ${MEASURED_BOOT_MK} 416endif 417