1# 2# Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7ifeq (${ARCH}, aarch64) 8 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 9 # DRAM (if available) or the TZC secured area of DRAM. 10 # TZC secured DRAM is the default. 11 12 ARM_TSP_RAM_LOCATION ?= dram 13 14 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 15 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 16 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 17 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 18 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 19 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 20 else 21 $(error "Unsupported ARM_TSP_RAM_LOCATION value") 22 endif 23 24 # Process flags 25 # Process ARM_BL31_IN_DRAM flag 26 ARM_BL31_IN_DRAM := 0 27 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 28 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 29else 30 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 31endif 32 33$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 34 35 36# For the original power-state parameter format, the State-ID can be encoded 37# according to the recommended encoding or zero. This flag determines which 38# State-ID encoding to be parsed. 39ARM_RECOM_STATE_ID_ENC := 0 40 41# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 42# be set. Else throw a build error. 43ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 44 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 45 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 46 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 47 endif 48endif 49 50# Process ARM_RECOM_STATE_ID_ENC flag 51$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 52$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 53 54# Process ARM_DISABLE_TRUSTED_WDOG flag 55# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set 56ARM_DISABLE_TRUSTED_WDOG := 0 57ifeq (${SPIN_ON_BL1_EXIT}, 1) 58ARM_DISABLE_TRUSTED_WDOG := 1 59endif 60$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 61$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 62 63# Process ARM_CONFIG_CNTACR 64ARM_CONFIG_CNTACR := 1 65$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 66$(eval $(call add_define,ARM_CONFIG_CNTACR)) 67 68# Process ARM_BL31_IN_DRAM flag 69ARM_BL31_IN_DRAM := 0 70$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 71$(eval $(call add_define,ARM_BL31_IN_DRAM)) 72 73# Process ARM_PLAT_MT flag 74ARM_PLAT_MT := 0 75$(eval $(call assert_boolean,ARM_PLAT_MT)) 76$(eval $(call add_define,ARM_PLAT_MT)) 77 78# Use translation tables library v2 by default 79ARM_XLAT_TABLES_LIB_V1 := 0 80$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 81$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 82 83# Use an implementation of SHA-256 with a smaller memory footprint but reduced 84# speed. 85$(eval $(call add_define,MBEDTLS_SHA256_SMALLER)) 86 87# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 88# in the FIP if the platform requires. 89ifneq ($(BL32_EXTRA1),) 90$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 91endif 92ifneq ($(BL32_EXTRA2),) 93$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 94endif 95 96# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 97ENABLE_PSCI_STAT := 1 98ENABLE_PMF := 1 99 100# On ARM platforms, separate the code and read-only data sections to allow 101# mapping the former as executable and the latter as execute-never. 102SEPARATE_CODE_AND_RODATA := 1 103 104# Enable new version of image loading on ARM platforms 105LOAD_IMAGE_V2 := 1 106 107# Use generic OID definition (tbbr_oid.h) 108USE_TBBR_DEFS := 1 109 110# Disable ARM Cryptocell by default 111ARM_CRYPTOCELL_INTEG := 0 112$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG)) 113$(eval $(call add_define,ARM_CRYPTOCELL_INTEG)) 114 115PLAT_INCLUDES += -Iinclude/common/tbbr \ 116 -Iinclude/plat/arm/common 117 118ifeq (${ARCH}, aarch64) 119PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 120endif 121 122PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 123 plat/arm/common/arm_common.c 124 125ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 126PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 127 lib/xlat_tables/${ARCH}/xlat_tables.c 128else 129include lib/xlat_tables_v2/xlat_tables.mk 130 131PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 132endif 133 134BL1_SOURCES += drivers/arm/sp805/sp805.c \ 135 drivers/io/io_fip.c \ 136 drivers/io/io_memmap.c \ 137 drivers/io/io_storage.c \ 138 plat/arm/common/arm_bl1_setup.c \ 139 plat/arm/common/arm_io_storage.c 140ifdef EL3_PAYLOAD_BASE 141# Need the arm_program_trusted_mailbox() function to release secondary CPUs from 142# their holding pen 143BL1_SOURCES += plat/arm/common/arm_pm.c 144endif 145 146BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 147 drivers/delay_timer/generic_delay_timer.c \ 148 drivers/io/io_fip.c \ 149 drivers/io/io_memmap.c \ 150 drivers/io/io_storage.c \ 151 plat/arm/common/arm_bl2_setup.c \ 152 plat/arm/common/arm_io_storage.c 153 154ifeq (${BL2_AT_EL3},1) 155BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c 156endif 157 158ifeq (${LOAD_IMAGE_V2},1) 159# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 160# the AArch32 descriptors. 161ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 162BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 163else 164BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 165endif 166BL2_SOURCES += plat/arm/common/arm_image_load.c \ 167 common/desc_image_load.c 168ifeq (${SPD},opteed) 169BL2_SOURCES += lib/optee/optee_utils.c 170endif 171endif 172 173BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 174 drivers/delay_timer/generic_delay_timer.c \ 175 plat/arm/common/arm_bl2u_setup.c 176 177BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 178 plat/arm/common/arm_pm.c \ 179 plat/arm/common/arm_topology.c \ 180 plat/arm/common/execution_state_switch.c \ 181 plat/common/plat_psci_common.c 182 183ifeq (${ENABLE_PMF}, 1) 184BL31_SOURCES += plat/arm/common/arm_sip_svc.c \ 185 lib/pmf/pmf_smc.c 186endif 187 188ifeq (${EL3_EXCEPTION_HANDLING},1) 189BL31_SOURCES += plat/arm/common/aarch64/arm_ehf.c 190endif 191 192ifeq (${SDEI_SUPPORT},1) 193BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 194endif 195 196ifneq (${TRUSTED_BOARD_BOOT},0) 197 198 # Include common TBB sources 199 AUTH_SOURCES := drivers/auth/auth_mod.c \ 200 drivers/auth/crypto_mod.c \ 201 drivers/auth/img_parser_mod.c \ 202 drivers/auth/tbbr/tbbr_cot.c \ 203 204 PLAT_INCLUDES += -Iinclude/bl1/tbbr 205 206 BL1_SOURCES += ${AUTH_SOURCES} \ 207 bl1/tbbr/tbbr_img_desc.c \ 208 plat/arm/common/arm_bl1_fwu.c \ 209 plat/common/tbbr/plat_tbbr.c 210 211 BL2_SOURCES += ${AUTH_SOURCES} \ 212 plat/common/tbbr/plat_tbbr.c 213 214 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 215 216 # We expect to locate the *.mk files under the directories specified below 217ifeq (${ARM_CRYPTOCELL_INTEG},0) 218 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 219else 220 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk 221endif 222 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 223 224 $(info Including ${CRYPTO_LIB_MK}) 225 include ${CRYPTO_LIB_MK} 226 227 $(info Including ${IMG_PARSER_LIB_MK}) 228 include ${IMG_PARSER_LIB_MK} 229 230endif 231