xref: /rk3399_ARM-atf/plat/arm/common/arm_common.mk (revision 10ecd58093a34e95e2dfad65b1180610f29397cc)
1#
2# Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include common/fdt_wrappers.mk
8
9ifeq (${ARCH},aarch32)
10    ifeq (${AARCH32_SP},none)
11        $(error Variable AARCH32_SP has to be set for AArch32)
12    endif
13endif
14
15ifeq (${ARCH}, aarch64)
16  # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
17  # DRAM (if available) or the TZC secured area of DRAM.
18  # TZC secured DRAM is the default.
19
20  ARM_TSP_RAM_LOCATION	?=	dram
21
22  ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
23    ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
24  else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
25    ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
26  else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
27    ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
28  else
29    $(error Unsupported ARM_TSP_RAM_LOCATION value)
30  endif
31
32  # Process flags
33  # Process ARM_BL31_IN_DRAM flag
34  ARM_BL31_IN_DRAM		:=	0
35  $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
36  $(eval $(call add_define,ARM_BL31_IN_DRAM))
37else
38  ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
39endif
40
41$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
42
43
44# For the original power-state parameter format, the State-ID can be encoded
45# according to the recommended encoding or zero. This flag determines which
46# State-ID encoding to be parsed.
47ARM_RECOM_STATE_ID_ENC := 0
48
49# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
50# be set. Else throw a build error.
51ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
52  ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
53    $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
54            PSCI_EXTENDED_STATE_ID is set for ARM platforms)
55  endif
56endif
57
58# Process ARM_RECOM_STATE_ID_ENC flag
59$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
60$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
61
62# Process ARM_DISABLE_TRUSTED_WDOG flag
63# By default, Trusted Watchdog is always enabled unless
64# SPIN_ON_BL1_EXIT or ENABLE_RME is set
65ARM_DISABLE_TRUSTED_WDOG	:=	0
66ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),)
67ARM_DISABLE_TRUSTED_WDOG	:=	1
68endif
69$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
70$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
71
72# Process ARM_CONFIG_CNTACR
73ARM_CONFIG_CNTACR		:=	1
74$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
75$(eval $(call add_define,ARM_CONFIG_CNTACR))
76
77# Process ARM_BL31_IN_DRAM flag
78ARM_BL31_IN_DRAM		:=	0
79$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
80$(eval $(call add_define,ARM_BL31_IN_DRAM))
81
82# As per CCA security model, all root firmware must execute from on-chip secure
83# memory. This means we must not run BL31 from TZC-protected DRAM.
84ifeq (${ARM_BL31_IN_DRAM},1)
85  ifeq (${ENABLE_RME},1)
86    $(error BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0)
87  endif
88endif
89
90# Process ARM_PLAT_MT flag
91ARM_PLAT_MT			:=	0
92$(eval $(call assert_boolean,ARM_PLAT_MT))
93$(eval $(call add_define,ARM_PLAT_MT))
94
95# Use translation tables library v2 by default
96ARM_XLAT_TABLES_LIB_V1		:=	0
97$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
98$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
99
100# Don't have the Linux kernel as a BL33 image by default
101ARM_LINUX_KERNEL_AS_BL33	:=	0
102$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
103$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
104
105ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
106  ifneq (${ARCH},aarch64)
107    ifneq (${RESET_TO_SP_MIN},1)
108      $(error ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.)
109    endif
110  endif
111  ifeq (${RESET_TO_BL31},1)
112    ifndef ARM_PRELOADED_DTB_BASE
113      $(error ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used with RESET_TO_BL31.)
114    endif
115    $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
116  endif
117endif
118
119# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
120# in the FIP if the platform requires.
121ifneq ($(BL32_EXTRA1),)
122$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
123endif
124ifneq ($(BL32_EXTRA2),)
125$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
126endif
127
128# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
129ENABLE_PSCI_STAT		:=	1
130ENABLE_PMF			:=	1
131
132# Override the standard libc with optimised libc_asm
133OVERRIDE_LIBC			:=	1
134ifeq (${OVERRIDE_LIBC},1)
135    include lib/libc/libc_asm.mk
136endif
137
138# On ARM platforms, separate the code and read-only data sections to allow
139# mapping the former as executable and the latter as execute-never.
140SEPARATE_CODE_AND_RODATA	:=	1
141
142# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
143# and NOBITS sections of BL31 image are adjacent to each other and loaded
144# into Trusted SRAM.
145SEPARATE_NOBITS_REGION		:=	0
146
147# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
148# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
149# the build to require that ARM_BL31_IN_DRAM is enabled as well.
150ifeq ($(SEPARATE_NOBITS_REGION),1)
151    ifneq ($(ARM_BL31_IN_DRAM),1)
152         $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
153    endif
154    ifneq ($(RECLAIM_INIT_CODE),0)
155          $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
156    endif
157endif
158
159# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case
160ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
161	ENABLE_PIE			:=	1
162endif
163
164# On Arm platform, disable ARM_FW_CONFIG_LOAD_ENABLE by default.
165ARM_FW_CONFIG_LOAD_ENABLE		:= 0
166$(eval $(call assert_boolean,ARM_FW_CONFIG_LOAD_ENABLE))
167$(eval $(call add_define,ARM_FW_CONFIG_LOAD_ENABLE))
168
169# In order to enable ARM_FW_CONFIG_LOAD_ENABLE for the Arm platform, the
170# platform should be reset to BL2 (RESET_TO_BL2=1), and FW_CONFIG must be
171# specified.
172ifeq (${ARM_FW_CONFIG_LOAD_ENABLE},1)
173    ifneq (${RESET_TO_BL2},1)
174        $(error RESET_TO_BL2 must be enabled when ARM_FW_CONFIG_LOAD_ENABLE \
175            is enabled)
176    endif
177    ifeq (${FW_CONFIG},)
178        $(error FW_CONFIG must be specified when ARM_FW_CONFIG_LOAD_ENABLE \
179            is enabled)
180    endif
181endif
182
183# Disable GPT parser support, use FIP image by default
184ARM_GPT_SUPPORT			:=	0
185$(eval $(call assert_boolean,ARM_GPT_SUPPORT))
186$(eval $(call add_define,ARM_GPT_SUPPORT))
187
188# Include necessary sources to parse GPT image
189ifeq (${ARM_GPT_SUPPORT}, 1)
190  BL2_SOURCES	+=	drivers/partition/gpt.c		\
191			drivers/partition/partition.c
192endif
193
194# Enable CRC instructions via extension for ARMv8-A CPUs.
195# For ARMv8.1-A, and onwards CRC instructions are default enabled.
196# Enable HW computed CRC support unconditionally in BL2 component.
197ifeq (${ARM_ARCH_MAJOR},8)
198    ifeq (${ARM_ARCH_MINOR},0)
199        BL2_CPPFLAGS += -march=armv8-a+crc
200    endif
201endif
202
203ifeq ($(PSA_FWU_SUPPORT),1)
204    # GPT support is recommended as per PSA FWU specification hence
205    # PSA FWU implementation is tightly coupled with GPT support,
206    # and it does not support other formats.
207    ifneq ($(ARM_GPT_SUPPORT),1)
208      $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled)
209    endif
210    FWU_MK := drivers/fwu/fwu.mk
211    $(info Including ${FWU_MK})
212    include ${FWU_MK}
213endif
214
215ifeq (${ARCH}, aarch64)
216PLAT_INCLUDES		+=	-Iinclude/plat/arm/common/aarch64
217endif
218
219PLAT_BL_COMMON_SOURCES	+=	plat/arm/common/${ARCH}/arm_helpers.S		\
220				plat/arm/common/arm_common.c			\
221				plat/arm/common/arm_console.c
222
223ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
224PLAT_BL_COMMON_SOURCES 	+=	lib/xlat_tables/xlat_tables_common.c	      \
225				lib/xlat_tables/${ARCH}/xlat_tables.c
226else
227include lib/xlat_tables_v2/xlat_tables.mk
228PLAT_BL_COMMON_SOURCES	+=      ${XLAT_TABLES_LIB_SRCS}
229endif
230
231ARM_IO_SOURCES		+=	plat/arm/common/arm_io_storage.c		\
232				plat/arm/common/fconf/arm_fconf_io.c
233ifeq (${SPD},spmd)
234    ifeq (${BL2_ENABLE_SP_LOAD},1)
235         ARM_IO_SOURCES		+=	plat/arm/common/fconf/arm_fconf_sp.c
236    endif
237endif
238
239BL1_SOURCES		+=	drivers/io/io_fip.c				\
240				drivers/io/io_memmap.c				\
241				drivers/io/io_storage.c				\
242				plat/arm/common/arm_bl1_setup.c			\
243				plat/arm/common/arm_err.c			\
244				${ARM_IO_SOURCES}
245
246ifdef EL3_PAYLOAD_BASE
247# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from
248# their holding pen
249BL1_SOURCES		+=	plat/arm/common/arm_pm.c
250endif
251
252BL2_SOURCES		+=	drivers/delay_timer/delay_timer.c		\
253				drivers/delay_timer/generic_delay_timer.c	\
254				drivers/io/io_fip.c				\
255				drivers/io/io_memmap.c				\
256				drivers/io/io_storage.c				\
257				plat/arm/common/arm_bl2_setup.c			\
258				plat/arm/common/arm_err.c			\
259				common/tf_crc32.c				\
260				${ARM_IO_SOURCES}
261
262# Firmware Configuration Framework sources
263include lib/fconf/fconf.mk
264
265BL1_SOURCES		+=	${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
266BL2_SOURCES		+=	${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
267
268# Add `libfdt` and Arm common helpers required for Dynamic Config
269include lib/libfdt/libfdt.mk
270
271DYN_CFG_SOURCES		+=	plat/arm/common/arm_dyn_cfg.c		\
272				plat/arm/common/arm_dyn_cfg_helpers.c	\
273				common/uuid.c
274
275DYN_CFG_SOURCES		+=	${FDT_WRAPPERS_SOURCES}
276
277BL1_SOURCES		+=	${DYN_CFG_SOURCES}
278BL2_SOURCES		+=	${DYN_CFG_SOURCES}
279
280ifeq (${RESET_TO_BL2},1)
281BL2_SOURCES		+=	plat/arm/common/arm_bl2_el3_setup.c
282endif
283
284# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
285# the AArch32 descriptors.
286ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
287BL2_SOURCES		+=	plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
288else
289ifeq ($(filter $(PLAT), corstone1000 rd1ae),)
290BL2_SOURCES		+=	plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
291endif
292endif
293BL2_SOURCES		+=	plat/arm/common/arm_image_load.c		\
294				common/desc_image_load.c
295ifeq (${SPD},opteed)
296BL2_SOURCES		+=	lib/optee/optee_utils.c
297endif
298
299BL2U_SOURCES		+=	drivers/delay_timer/delay_timer.c		\
300				drivers/delay_timer/generic_delay_timer.c	\
301				plat/arm/common/arm_bl2u_setup.c
302
303BL31_SOURCES		+=	plat/arm/common/arm_bl31_setup.c		\
304				plat/arm/common/arm_pm.c			\
305				plat/arm/common/arm_topology.c			\
306				plat/common/plat_psci_common.c
307
308ifeq (${TRANSFER_LIST}, 1)
309	include lib/transfer_list/transfer_list.mk
310	TRANSFER_LIST_SOURCES += plat/arm/common/arm_transfer_list.c
311endif
312
313ifneq ($(filter 1,${ENABLE_PMF} ${ETHOSN_NPU_DRIVER}),)
314ARM_SVC_HANDLER_SRCS :=
315
316ifeq (${ENABLE_PMF},1)
317ARM_SVC_HANDLER_SRCS	+=	lib/pmf/pmf_smc.c
318endif
319
320ifeq (${ETHOSN_NPU_DRIVER},1)
321ARM_SVC_HANDLER_SRCS	+=	plat/arm/common/fconf/fconf_ethosn_getter.c	\
322				drivers/delay_timer/delay_timer.c		\
323				drivers/arm/ethosn/ethosn_smc.c
324ifeq (${ETHOSN_NPU_TZMP1},1)
325ARM_SVC_HANDLER_SRCS	+=	drivers/arm/ethosn/ethosn_big_fw.c
326endif
327endif
328
329ifeq (${ARCH}, aarch64)
330BL31_SOURCES		+=	plat/arm/common/aarch64/execution_state_switch.c\
331				plat/arm/common/arm_sip_svc.c			\
332				plat/arm/common/plat_arm_sip_svc.c		\
333				${ARM_SVC_HANDLER_SRCS}
334else
335BL32_SOURCES		+=	plat/arm/common/arm_sip_svc.c			\
336				plat/arm/common/plat_arm_sip_svc.c		\
337				${ARM_SVC_HANDLER_SRCS}
338endif
339endif
340
341ifeq (${EL3_EXCEPTION_HANDLING},1)
342BL31_SOURCES		+=	plat/common/aarch64/plat_ehf.c
343endif
344
345ifeq (${SDEI_SUPPORT},1)
346BL31_SOURCES		+=	plat/arm/common/aarch64/arm_sdei.c
347ifeq (${SDEI_IN_FCONF},1)
348BL31_SOURCES		+=	plat/arm/common/fconf/fconf_sdei_getter.c
349endif
350endif
351
352# RAS sources
353ifeq (${ENABLE_FEAT_RAS}-${HANDLE_EA_EL3_FIRST_NS},1-1)
354BL31_SOURCES		+=	lib/extensions/ras/std_err_record.c		\
355				lib/extensions/ras/ras_common.c
356endif
357
358# Pointer Authentication sources
359ifeq ($(BRANCH_PROTECTION),$(filter $(BRANCH_PROTECTION),1 2 3))
360PLAT_BL_COMMON_SOURCES	+=	plat/arm/common/aarch64/arm_pauth.c
361endif
362
363ifeq (${SPD},spmd)
364BL31_SOURCES		+=	plat/common/plat_spmd_manifest.c	\
365				common/uuid.c				\
366				${LIBFDT_SRCS}
367
368BL31_SOURCES		+=	${FDT_WRAPPERS_SOURCES}
369endif
370
371ifeq (${DRTM_SUPPORT},1)
372BL31_SOURCES            +=	plat/arm/common/arm_err.c
373endif
374
375ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),)
376    PLAT_INCLUDES		+=	-Iplat/arm/common	\
377					-Iinclude/drivers/auth/mbedtls
378    ifeq (${HASH_ALG}, sha512)
379      ARM_ROTPK_HASH_LEN	:=	64
380    else ifeq (${HASH_ALG}, sha384)
381      ARM_ROTPK_HASH_LEN	:=	48
382    else
383      ARM_ROTPK_HASH_LEN	:=	32
384    endif
385    $(eval $(call add_define,ARM_ROTPK_HASH_LEN))
386endif
387
388ifneq (${TRUSTED_BOARD_BOOT},0)
389
390    # Include common TBB sources
391    AUTH_SOURCES 	:= 	drivers/auth/auth_mod.c	\
392				drivers/auth/img_parser_mod.c
393
394    # Include the selected chain of trust sources.
395    ifeq (${COT},tbbr)
396            BL1_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_common.c		\
397				drivers/auth/tbbr/tbbr_cot_bl1.c
398        ifneq (${COT_DESC_IN_DTB},0)
399            BL2_SOURCES	+=	lib/fconf/fconf_cot_getter.c
400        else
401	    # Juno has its own TBBR CoT file for BL2
402            ifeq (${PLAT},juno)
403                BL2_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_common.c
404            endif
405        endif
406    else ifeq (${COT},dualroot)
407        BL1_SOURCES	+=	drivers/auth/dualroot/bl1_cot.c
408        ifneq (${COT_DESC_IN_DTB},0)
409            BL2_SOURCES	+=	lib/fconf/fconf_cot_getter.c
410        endif
411    else ifeq (${COT},cca)
412        BL1_SOURCES	+=	drivers/auth/cca/bl1_cot.c
413        ifneq (${COT_DESC_IN_DTB},0)
414            BL2_SOURCES	+=	lib/fconf/fconf_cot_getter.c
415        endif
416    else
417        $(error Unknown chain of trust ${COT})
418    endif
419
420    ifeq (${COT_DESC_IN_DTB},0)
421      ifeq (${COT},dualroot)
422        COTDTPATH := fdts/dualroot_cot_descriptors.dtsi
423      else ifeq (${COT},cca)
424        COTDTPATH := fdts/cca_cot_descriptors.dtsi
425      else ifeq (${COT},tbbr)
426        ifneq (${PLAT},juno)
427          COTDTPATH := fdts/tbbr_cot_descriptors.dtsi
428        endif
429      endif
430    endif
431
432    BL1_SOURCES		+=	${AUTH_SOURCES}					\
433				bl1/tbbr/tbbr_img_desc.c			\
434				plat/arm/common/arm_bl1_fwu.c			\
435				plat/common/tbbr/plat_tbbr.c
436
437    BL2_SOURCES		+=	${AUTH_SOURCES}					\
438				plat/common/tbbr/plat_tbbr.c
439
440    $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
441
442    IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
443
444    $(info Including ${IMG_PARSER_LIB_MK})
445    include ${IMG_PARSER_LIB_MK}
446endif
447
448# Include Measured Boot makefile before any Crypto library makefile.
449# Crypto library makefile may need default definitions of Measured Boot build
450# flags present in Measured Boot makefile.
451ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),)
452    MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
453    $(info Including ${MEASURED_BOOT_MK})
454    include ${MEASURED_BOOT_MK}
455
456    ifeq (${MEASURED_BOOT},1)
457         BL1_SOURCES		+= 	${EVENT_LOG_SOURCES}
458         BL2_SOURCES		+= 	${EVENT_LOG_SOURCES}
459    endif
460
461    ifeq (${DRTM_SUPPORT},1)
462         BL31_SOURCES	        += 	${EVENT_LOG_SOURCES}
463    endif
464endif
465
466ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),)
467    CRYPTO_SOURCES	:=	drivers/auth/crypto_mod.c 	\
468				lib/fconf/fconf_tbbr_getter.c
469    BL1_SOURCES		+=	${CRYPTO_SOURCES}
470    BL2_SOURCES		+=	${CRYPTO_SOURCES}
471    BL31_SOURCES	+=	drivers/auth/crypto_mod.c
472
473    # We expect to locate the *.mk files under the directories specified below
474    CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
475
476    $(info Including ${CRYPTO_LIB_MK})
477    include ${CRYPTO_LIB_MK}
478endif
479
480ifeq (${RECLAIM_INIT_CODE}, 1)
481    ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
482        $(error To reclaim init code xlat tables v2 must be used)
483    endif
484endif
485
486ifneq ($(COTDTPATH),)
487        cot-dt-defines = IMAGE_BL2 $(BL2_DEFINES) $(PLAT_BL_COMMON_DEFINES)
488        cot-dt-include-dirs = $(BL2_INCLUDE_DIRS) $(PLAT_BL_COMMON_INCLUDE_DIRS)
489
490        cot-dt-cpp-flags  = $(cot-dt-defines:%=-D%)
491        cot-dt-cpp-flags += $(cot-dt-include-dirs:%=-I%)
492
493        cot-dt-cpp-flags += $(BL2_CPPFLAGS) $(PLAT_BL_COMMON_CPPFLAGS)
494        cot-dt-cpp-flags += $(CPPFLAGS) $(BL_CPPFLAGS) $(TF_CFLAGS_$(ARCH))
495        cot-dt-cpp-flags += -c -x assembler-with-cpp -E -P -o $@ $<
496
497        $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts): $(COTDTPATH) | $$(@D)/
498		$(q)$($(ARCH)-cpp) $(cot-dt-cpp-flags)
499
500        $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c): $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts) | $$(@D)/
501		$(if $(host-poetry),$(q)poetry -q install --no-root)
502		$(q)$(if $(host-poetry),poetry run )cot-dt2c convert-to-c $< $@
503
504        BL2_SOURCES += $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c)
505endif
506