1# 2# Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9ifeq (${ARCH},aarch32) 10 ifeq (${AARCH32_SP},none) 11 $(error Variable AARCH32_SP has to be set for AArch32) 12 endif 13endif 14 15ifeq (${ARCH}, aarch64) 16 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 17 # DRAM (if available) or the TZC secured area of DRAM. 18 # TZC secured DRAM is the default. 19 20 ARM_TSP_RAM_LOCATION ?= dram 21 22 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 23 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 24 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 25 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 26 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 27 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 28 else 29 $(error Unsupported ARM_TSP_RAM_LOCATION value) 30 endif 31 32 # Process flags 33 # Process ARM_BL31_IN_DRAM flag 34 ARM_BL31_IN_DRAM := 0 35 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 36 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 37else 38 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 39endif 40 41$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 42 43 44# For the original power-state parameter format, the State-ID can be encoded 45# according to the recommended encoding or zero. This flag determines which 46# State-ID encoding to be parsed. 47ARM_RECOM_STATE_ID_ENC := 0 48 49# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 50# be set. Else throw a build error. 51ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 52 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 53 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 54 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 55 endif 56endif 57 58# Process ARM_RECOM_STATE_ID_ENC flag 59$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 60$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 61 62# Process ARM_DISABLE_TRUSTED_WDOG flag 63# By default, Trusted Watchdog is always enabled unless 64# SPIN_ON_BL1_EXIT or ENABLE_RME is set 65ARM_DISABLE_TRUSTED_WDOG := 0 66ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),) 67ARM_DISABLE_TRUSTED_WDOG := 1 68endif 69$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 70$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 71 72# Process ARM_CONFIG_CNTACR 73ARM_CONFIG_CNTACR := 1 74$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 75$(eval $(call add_define,ARM_CONFIG_CNTACR)) 76 77# Process ARM_BL31_IN_DRAM flag 78ARM_BL31_IN_DRAM := 0 79$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 80$(eval $(call add_define,ARM_BL31_IN_DRAM)) 81 82# Macro to enable ACS SMC handler 83PLAT_ARM_ACS_SMC_HANDLER := 0 84ifeq (${ENABLE_ACS_SMC}, 1) 85PLAT_ARM_ACS_SMC_HANDLER := 1 86endif 87 88# Build macro necessary for branching to ACS tests 89$(eval $(call add_define,PLAT_ARM_ACS_SMC_HANDLER)) 90 91# As per CCA security model, all root firmware must execute from on-chip secure 92# memory. This means we must not run BL31 from TZC-protected DRAM. 93ifeq (${ARM_BL31_IN_DRAM},1) 94 ifeq (${ENABLE_RME},1) 95 $(error BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0) 96 endif 97endif 98 99# Process ARM_PLAT_MT flag 100ARM_PLAT_MT := 0 101$(eval $(call assert_boolean,ARM_PLAT_MT)) 102$(eval $(call add_define,ARM_PLAT_MT)) 103 104# Use translation tables library v2 by default 105ARM_XLAT_TABLES_LIB_V1 := 0 106$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 107$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 108 109# Don't have the Linux kernel as a BL33 image by default 110ARM_LINUX_KERNEL_AS_BL33 := 0 111$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 112$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 113 114ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) 115 ifneq (${ARCH},aarch64) 116 ifneq (${RESET_TO_SP_MIN},1) 117 $(error ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.) 118 endif 119 endif 120 ifeq (${RESET_TO_BL31},1) 121 ifndef ARM_PRELOADED_DTB_BASE 122 $(error ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used with RESET_TO_BL31.) 123 endif 124 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 125 endif 126endif 127 128# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 129# in the FIP if the platform requires. 130ifneq ($(BL32_EXTRA1),) 131$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 132endif 133ifneq ($(BL32_EXTRA2),) 134$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 135endif 136 137# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 138ENABLE_PSCI_STAT := 1 139ENABLE_PMF := 1 140 141# Override the standard libc with optimised libc_asm 142OVERRIDE_LIBC := 1 143ifeq (${OVERRIDE_LIBC},1) 144 include lib/libc/libc_asm.mk 145endif 146 147# On ARM platforms, separate the code and read-only data sections to allow 148# mapping the former as executable and the latter as execute-never. 149SEPARATE_CODE_AND_RODATA := 1 150 151# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS 152# and NOBITS sections of BL31 image are adjacent to each other and loaded 153# into Trusted SRAM. 154SEPARATE_NOBITS_REGION := 0 155 156# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load 157# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate 158# the build to require that ARM_BL31_IN_DRAM is enabled as well. 159ifeq ($(SEPARATE_NOBITS_REGION),1) 160 ifneq ($(ARM_BL31_IN_DRAM),1) 161 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) 162 endif 163 ifneq ($(RECLAIM_INIT_CODE),0) 164 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) 165 endif 166endif 167 168# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case 169ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 170 ENABLE_PIE := 1 171endif 172 173# On Arm platform, disable ARM_FW_CONFIG_LOAD_ENABLE by default. 174ARM_FW_CONFIG_LOAD_ENABLE := 0 175$(eval $(call assert_boolean,ARM_FW_CONFIG_LOAD_ENABLE)) 176$(eval $(call add_define,ARM_FW_CONFIG_LOAD_ENABLE)) 177 178# In order to enable ARM_FW_CONFIG_LOAD_ENABLE for the Arm platform, the 179# platform should be reset to BL2 (RESET_TO_BL2=1), and FW_CONFIG must be 180# specified. 181ifeq (${ARM_FW_CONFIG_LOAD_ENABLE},1) 182 ifneq (${RESET_TO_BL2},1) 183 $(error RESET_TO_BL2 must be enabled when ARM_FW_CONFIG_LOAD_ENABLE \ 184 is enabled) 185 endif 186 ifeq (${FW_CONFIG},) 187 $(error FW_CONFIG must be specified when ARM_FW_CONFIG_LOAD_ENABLE \ 188 is enabled) 189 endif 190endif 191 192# Disable GPT parser support, use FIP image by default 193ARM_GPT_SUPPORT := 0 194$(eval $(call assert_boolean,ARM_GPT_SUPPORT)) 195$(eval $(call add_define,ARM_GPT_SUPPORT)) 196 197# Include necessary sources to parse GPT image 198ifeq (${ARM_GPT_SUPPORT}, 1) 199 BL2_SOURCES += drivers/partition/gpt.c \ 200 drivers/partition/partition.c 201endif 202 203# Enable CRC instructions via extension for ARMv8-A CPUs. 204# For ARMv8.1-A, and onwards CRC instructions are default enabled. 205# Enable HW computed CRC support unconditionally in BL2 component. 206ifeq (${ARM_ARCH_MAJOR},8) 207 ifeq (${ARM_ARCH_MINOR},0) 208 BL2_CPPFLAGS += -march=armv8-a+crc 209 endif 210endif 211 212ifeq ($(PSA_FWU_SUPPORT),1) 213 # GPT support is recommended as per PSA FWU specification hence 214 # PSA FWU implementation is tightly coupled with GPT support, 215 # and it does not support other formats. 216 ifneq ($(ARM_GPT_SUPPORT),1) 217 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled) 218 endif 219 FWU_MK := drivers/fwu/fwu.mk 220 $(info Including ${FWU_MK}) 221 include ${FWU_MK} 222endif 223 224ifeq (${ARCH}, aarch64) 225PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 226endif 227 228PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 229 plat/arm/common/arm_common.c \ 230 plat/arm/common/arm_console.c 231 232ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 233PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 234 lib/xlat_tables/${ARCH}/xlat_tables.c 235else 236include lib/xlat_tables_v2/xlat_tables.mk 237PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 238endif 239 240ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ 241 plat/arm/common/fconf/arm_fconf_io.c 242ifeq (${SPD},spmd) 243 ifeq (${BL2_ENABLE_SP_LOAD},1) 244 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c 245 endif 246endif 247 248BL1_SOURCES += drivers/io/io_fip.c \ 249 drivers/io/io_memmap.c \ 250 drivers/io/io_storage.c \ 251 plat/arm/common/arm_bl1_setup.c \ 252 plat/arm/common/arm_err.c \ 253 ${ARM_IO_SOURCES} 254 255ifdef EL3_PAYLOAD_BASE 256# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from 257# their holding pen 258BL1_SOURCES += plat/arm/common/arm_pm.c 259endif 260 261BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 262 drivers/delay_timer/generic_delay_timer.c \ 263 drivers/io/io_fip.c \ 264 drivers/io/io_memmap.c \ 265 drivers/io/io_storage.c \ 266 plat/arm/common/arm_bl2_setup.c \ 267 plat/arm/common/arm_err.c \ 268 common/tf_crc32.c \ 269 ${ARM_IO_SOURCES} 270 271# Firmware Configuration Framework sources 272include lib/fconf/fconf.mk 273 274BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 275BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 276 277# Add `libfdt` and Arm common helpers required for Dynamic Config 278include lib/libfdt/libfdt.mk 279 280DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 281 plat/arm/common/arm_dyn_cfg_helpers.c \ 282 common/uuid.c 283 284DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES} 285 286BL1_SOURCES += ${DYN_CFG_SOURCES} 287BL2_SOURCES += ${DYN_CFG_SOURCES} 288 289ifeq (${RESET_TO_BL2},1) 290BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c 291endif 292 293# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 294# the AArch32 descriptors. 295ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 296BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 297else 298ifeq ($(filter $(PLAT), corstone1000 rd1ae),) 299BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 300endif 301endif 302BL2_SOURCES += plat/arm/common/arm_image_load.c \ 303 common/desc_image_load.c 304ifeq (${SPD},opteed) 305BL2_SOURCES += lib/optee/optee_utils.c 306endif 307 308BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 309 drivers/delay_timer/generic_delay_timer.c \ 310 plat/arm/common/arm_bl2u_setup.c 311 312BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 313 plat/arm/common/arm_pm.c \ 314 plat/arm/common/arm_topology.c \ 315 plat/common/plat_psci_common.c 316 317ifeq (${PLAT_ARM_ACS_SMC_HANDLER},1) 318BL31_SOURCES += plat/arm/common/plat_acs_smc_handler.c \ 319 ${VENDOR_EL3_SRCS} 320endif 321 322ifeq (${TRANSFER_LIST}, 1) 323 include lib/transfer_list/transfer_list.mk 324 TRANSFER_LIST_SOURCES += plat/arm/common/arm_transfer_list.c 325endif 326 327ifneq ($(filter 1,${ENABLE_PMF} ${ETHOSN_NPU_DRIVER}),) 328ARM_SVC_HANDLER_SRCS := 329 330ifeq (${ENABLE_PMF},1) 331ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c 332endif 333 334ifeq (${ETHOSN_NPU_DRIVER},1) 335ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \ 336 drivers/delay_timer/delay_timer.c \ 337 drivers/arm/ethosn/ethosn_smc.c 338ifeq (${ETHOSN_NPU_TZMP1},1) 339ARM_SVC_HANDLER_SRCS += drivers/arm/ethosn/ethosn_big_fw.c 340endif 341endif 342 343ifeq (${ARCH}, aarch64) 344BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\ 345 plat/arm/common/arm_sip_svc.c \ 346 plat/arm/common/plat_arm_sip_svc.c \ 347 ${ARM_SVC_HANDLER_SRCS} 348else 349BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ 350 plat/arm/common/plat_arm_sip_svc.c \ 351 ${ARM_SVC_HANDLER_SRCS} 352endif 353endif 354 355ifeq (${EL3_EXCEPTION_HANDLING},1) 356BL31_SOURCES += plat/common/aarch64/plat_ehf.c 357endif 358 359ifeq (${SDEI_SUPPORT},1) 360BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 361ifeq (${SDEI_IN_FCONF},1) 362BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c 363endif 364endif 365 366# RAS sources 367ifeq (${ENABLE_FEAT_RAS}-${HANDLE_EA_EL3_FIRST_NS},1-1) 368BL31_SOURCES += lib/extensions/ras/std_err_record.c \ 369 lib/extensions/ras/ras_common.c 370endif 371 372# Pointer Authentication sources 373ifeq ($(BRANCH_PROTECTION),$(filter $(BRANCH_PROTECTION),1 2 3 5)) 374PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c 375endif 376 377ifeq (${SPD},spmd) 378BL31_SOURCES += plat/common/plat_spmd_manifest.c \ 379 common/uuid.c \ 380 ${LIBFDT_SRCS} 381 382BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 383endif 384 385ifeq (${DRTM_SUPPORT},1) 386BL31_SOURCES += plat/arm/common/arm_err.c 387endif 388 389ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),) 390 PLAT_INCLUDES += -Iplat/arm/common \ 391 -Iinclude/drivers/auth/mbedtls 392 ifeq (${HASH_ALG}, sha512) 393 ARM_ROTPK_HASH_LEN := 64 394 else ifeq (${HASH_ALG}, sha384) 395 ARM_ROTPK_HASH_LEN := 48 396 else 397 ARM_ROTPK_HASH_LEN := 32 398 endif 399 $(eval $(call add_define,ARM_ROTPK_HASH_LEN)) 400endif 401 402ifneq (${TRUSTED_BOARD_BOOT},0) 403 404 # Include common TBB sources 405 AUTH_MK := drivers/auth/auth.mk 406 $(info Including ${AUTH_MK}) 407 include ${AUTH_MK} 408 409 # Include the selected chain of trust sources. 410 ifeq (${COT},tbbr) 411 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 412 drivers/auth/tbbr/tbbr_cot_bl1.c 413 ifneq (${COT_DESC_IN_DTB},0) 414 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 415 else 416 # Juno has its own TBBR CoT file for BL2 417 ifeq (${PLAT},juno) 418 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c 419 endif 420 endif 421 else ifeq (${COT},dualroot) 422 BL1_SOURCES += drivers/auth/dualroot/bl1_cot.c 423 ifneq (${COT_DESC_IN_DTB},0) 424 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 425 endif 426 else ifeq (${COT},cca) 427 BL1_SOURCES += drivers/auth/cca/bl1_cot.c 428 ifneq (${COT_DESC_IN_DTB},0) 429 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 430 endif 431 else 432 $(error Unknown chain of trust ${COT}) 433 endif 434 435 ifeq (${COT_DESC_IN_DTB},0) 436 ifeq (${COT},dualroot) 437 COTDTPATH := fdts/dualroot_cot_descriptors.dtsi 438 else ifeq (${COT},cca) 439 COTDTPATH := fdts/cca_cot_descriptors.dtsi 440 else ifeq (${COT},tbbr) 441 ifneq (${PLAT},juno) 442 COTDTPATH := fdts/tbbr_cot_descriptors.dtsi 443 endif 444 endif 445 endif 446 447 BL1_SOURCES += ${AUTH_SOURCES} \ 448 bl1/tbbr/tbbr_img_desc.c \ 449 plat/arm/common/arm_bl1_fwu.c \ 450 plat/common/tbbr/plat_tbbr.c 451 452 BL2_SOURCES += ${AUTH_SOURCES} \ 453 plat/common/tbbr/plat_tbbr.c 454 455 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 456 457 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 458 459 $(info Including ${IMG_PARSER_LIB_MK}) 460 include ${IMG_PARSER_LIB_MK} 461endif 462 463# Include Measured Boot makefile before any Crypto library makefile. 464# Crypto library makefile may need default definitions of Measured Boot build 465# flags present in Measured Boot makefile. 466ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),) 467 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk 468 $(info Including ${MEASURED_BOOT_MK}) 469 include ${MEASURED_BOOT_MK} 470 471 ifeq (${MEASURED_BOOT},1) 472 BL1_SOURCES += ${EVENT_LOG_SOURCES} 473 BL2_SOURCES += ${EVENT_LOG_SOURCES} 474 ifeq (${SPD_tspd},1) 475 BL32_SOURCES += ${EVENT_LOG_SOURCES} 476 endif 477 endif 478 479 ifeq (${DRTM_SUPPORT},1) 480 BL31_SOURCES += ${EVENT_LOG_SOURCES} 481 endif 482endif 483 484ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),) 485ifeq (${TRUSTED_BOARD_BOOT},0) 486 CRYPTO_SOURCES := drivers/auth/crypto_mod.c 487 BL1_SOURCES += ${CRYPTO_SOURCES} 488 BL2_SOURCES += ${CRYPTO_SOURCES} 489endif 490endif 491 492ifeq (${DRTM_SUPPORT},1) 493 BL31_SOURCES += drivers/auth/crypto_mod.c 494endif 495 496ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),) 497 FCONF_TBB_SOURCES := lib/fconf/fconf_tbbr_getter.c 498 BL1_SOURCES += ${FCONF_TBB_SOURCES} 499 BL2_SOURCES += ${FCONF_TBB_SOURCES} 500 501 # We expect to locate the *.mk files under the directories specified below 502 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 503 504 $(info Including ${CRYPTO_LIB_MK}) 505 include ${CRYPTO_LIB_MK} 506endif 507 508ifeq (${RECLAIM_INIT_CODE}, 1) 509 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 510 $(error To reclaim init code xlat tables v2 must be used) 511 endif 512endif 513 514ifneq ($(COTDTPATH),) 515 cot-dt-defines = IMAGE_BL2 $(BL2_DEFINES) $(PLAT_BL_COMMON_DEFINES) 516 cot-dt-include-dirs = $(BL2_INCLUDE_DIRS) $(PLAT_BL_COMMON_INCLUDE_DIRS) 517 518 cot-dt-cpp-flags = $(cot-dt-defines:%=-D%) 519 cot-dt-cpp-flags += $(cot-dt-include-dirs:%=-I%) 520 521 cot-dt-cpp-flags += $(BL2_CPPFLAGS) $(PLAT_BL_COMMON_CPPFLAGS) 522 cot-dt-cpp-flags += $(CPPFLAGS) $(BL_CPPFLAGS) $(TF_CFLAGS_$(ARCH)) 523 cot-dt-cpp-flags += -c -x assembler-with-cpp -E -P -o $@ $< 524 525 $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts): $(COTDTPATH) | $$(@D)/ 526 $(q)$($(ARCH)-cpp) $(cot-dt-cpp-flags) 527 528 $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c): $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.dts) | $$(@D)/ 529 $(if $(host-poetry),$(q)poetry -q install --no-root) 530 $(q)$(if $(host-poetry),poetry run )cot-dt2c convert-to-c $< $@ 531 532 BL2_SOURCES += $(BUILD_PLAT)/$(COTDTPATH:.dtsi=.c) 533endif 534