1*6355f234SVikram Kanigiri /* 2*6355f234SVikram Kanigiri * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3*6355f234SVikram Kanigiri * 4*6355f234SVikram Kanigiri * Redistribution and use in source and binary forms, with or without 5*6355f234SVikram Kanigiri * modification, are permitted provided that the following conditions are met: 6*6355f234SVikram Kanigiri * 7*6355f234SVikram Kanigiri * Redistributions of source code must retain the above copyright notice, this 8*6355f234SVikram Kanigiri * list of conditions and the following disclaimer. 9*6355f234SVikram Kanigiri * 10*6355f234SVikram Kanigiri * Redistributions in binary form must reproduce the above copyright notice, 11*6355f234SVikram Kanigiri * this list of conditions and the following disclaimer in the documentation 12*6355f234SVikram Kanigiri * and/or other materials provided with the distribution. 13*6355f234SVikram Kanigiri * 14*6355f234SVikram Kanigiri * Neither the name of ARM nor the names of its contributors may be used 15*6355f234SVikram Kanigiri * to endorse or promote products derived from this software without specific 16*6355f234SVikram Kanigiri * prior written permission. 17*6355f234SVikram Kanigiri * 18*6355f234SVikram Kanigiri * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*6355f234SVikram Kanigiri * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*6355f234SVikram Kanigiri * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*6355f234SVikram Kanigiri * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*6355f234SVikram Kanigiri * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*6355f234SVikram Kanigiri * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*6355f234SVikram Kanigiri * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*6355f234SVikram Kanigiri * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*6355f234SVikram Kanigiri * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*6355f234SVikram Kanigiri * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*6355f234SVikram Kanigiri * POSSIBILITY OF SUCH DAMAGE. 29*6355f234SVikram Kanigiri */ 30*6355f234SVikram Kanigiri 31*6355f234SVikram Kanigiri #include <arch.h> 32*6355f234SVikram Kanigiri #include <cci.h> 33*6355f234SVikram Kanigiri #include <plat_arm.h> 34*6355f234SVikram Kanigiri #include <platform_def.h> 35*6355f234SVikram Kanigiri 36*6355f234SVikram Kanigiri static const int cci_map[] = { 37*6355f234SVikram Kanigiri PLAT_ARM_CCI_CLUSTER0_SL_IFACE_IX, 38*6355f234SVikram Kanigiri PLAT_ARM_CCI_CLUSTER1_SL_IFACE_IX 39*6355f234SVikram Kanigiri }; 40*6355f234SVikram Kanigiri 41*6355f234SVikram Kanigiri /****************************************************************************** 42*6355f234SVikram Kanigiri * The following functions are defined as weak to allow a platform to override 43*6355f234SVikram Kanigiri * the way ARM CCI driver is initialised and used. 44*6355f234SVikram Kanigiri *****************************************************************************/ 45*6355f234SVikram Kanigiri #pragma weak plat_arm_interconnect_init 46*6355f234SVikram Kanigiri #pragma weak plat_arm_interconnect_enter_coherency 47*6355f234SVikram Kanigiri #pragma weak plat_arm_interconnect_exit_coherency 48*6355f234SVikram Kanigiri 49*6355f234SVikram Kanigiri 50*6355f234SVikram Kanigiri /****************************************************************************** 51*6355f234SVikram Kanigiri * Helper function to initialize ARM CCI driver. 52*6355f234SVikram Kanigiri *****************************************************************************/ 53*6355f234SVikram Kanigiri void plat_arm_interconnect_init(void) 54*6355f234SVikram Kanigiri { 55*6355f234SVikram Kanigiri cci_init(PLAT_ARM_CCI_BASE, cci_map, ARRAY_SIZE(cci_map)); 56*6355f234SVikram Kanigiri } 57*6355f234SVikram Kanigiri 58*6355f234SVikram Kanigiri /****************************************************************************** 59*6355f234SVikram Kanigiri * Helper function to place current master into coherency 60*6355f234SVikram Kanigiri *****************************************************************************/ 61*6355f234SVikram Kanigiri void plat_arm_interconnect_enter_coherency(void) 62*6355f234SVikram Kanigiri { 63*6355f234SVikram Kanigiri cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 64*6355f234SVikram Kanigiri } 65*6355f234SVikram Kanigiri 66*6355f234SVikram Kanigiri /****************************************************************************** 67*6355f234SVikram Kanigiri * Helper function to remove current master from coherency 68*6355f234SVikram Kanigiri *****************************************************************************/ 69*6355f234SVikram Kanigiri void plat_arm_interconnect_exit_coherency(void) 70*6355f234SVikram Kanigiri { 71*6355f234SVikram Kanigiri cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 72*6355f234SVikram Kanigiri } 73