1 /* 2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <arch.h> 10 #include <arch_helpers.h> 11 #include <common/bl_common.h> 12 #include <common/debug.h> 13 #include <drivers/console.h> 14 #include <lib/extensions/ras.h> 15 #include <lib/mmio.h> 16 #include <lib/utils.h> 17 #include <lib/xlat_tables/xlat_tables_compat.h> 18 #include <plat/common/platform.h> 19 #include <platform_def.h> 20 21 #include <plat_arm.h> 22 23 /* 24 * Placeholder variables for copying the arguments that have been passed to 25 * BL31 from BL2. 26 */ 27 static entry_point_info_t bl32_image_ep_info; 28 static entry_point_info_t bl33_image_ep_info; 29 30 #if !RESET_TO_BL31 31 /* 32 * Check that BL31_BASE is above ARM_TB_FW_CONFIG_LIMIT. The reserved page 33 * is required for SOC_FW_CONFIG/TOS_FW_CONFIG passed from BL2. 34 */ 35 CASSERT(BL31_BASE >= ARM_TB_FW_CONFIG_LIMIT, assert_bl31_base_overflows); 36 #endif 37 38 /* Weak definitions may be overridden in specific ARM standard platform */ 39 #pragma weak bl31_early_platform_setup2 40 #pragma weak bl31_platform_setup 41 #pragma weak bl31_plat_arch_setup 42 #pragma weak bl31_plat_get_next_image_ep_info 43 44 #define MAP_BL31_TOTAL MAP_REGION_FLAT( \ 45 BL31_START, \ 46 BL31_END - BL31_START, \ 47 MT_MEMORY | MT_RW | MT_SECURE) 48 #if RECLAIM_INIT_CODE 49 IMPORT_SYM(unsigned long, __INIT_CODE_START__, BL_INIT_CODE_BASE); 50 IMPORT_SYM(unsigned long, __INIT_CODE_END__, BL_INIT_CODE_END); 51 52 #define MAP_BL_INIT_CODE MAP_REGION_FLAT( \ 53 BL_INIT_CODE_BASE, \ 54 BL_INIT_CODE_END \ 55 - BL_INIT_CODE_BASE, \ 56 MT_CODE | MT_SECURE) 57 #endif 58 59 /******************************************************************************* 60 * Return a pointer to the 'entry_point_info' structure of the next image for the 61 * security state specified. BL33 corresponds to the non-secure image type 62 * while BL32 corresponds to the secure image type. A NULL pointer is returned 63 * if the image does not exist. 64 ******************************************************************************/ 65 struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type) 66 { 67 entry_point_info_t *next_image_info; 68 69 assert(sec_state_is_valid(type)); 70 next_image_info = (type == NON_SECURE) 71 ? &bl33_image_ep_info : &bl32_image_ep_info; 72 /* 73 * None of the images on the ARM development platforms can have 0x0 74 * as the entrypoint 75 */ 76 if (next_image_info->pc) 77 return next_image_info; 78 else 79 return NULL; 80 } 81 82 /******************************************************************************* 83 * Perform any BL31 early platform setup common to ARM standard platforms. 84 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1 85 * in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be 86 * done before the MMU is initialized so that the memory layout can be used 87 * while creating page tables. BL2 has flushed this information to memory, so 88 * we are guaranteed to pick up good data. 89 ******************************************************************************/ 90 void __init arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config, 91 uintptr_t hw_config, void *plat_params_from_bl2) 92 { 93 /* Initialize the console to provide early debug support */ 94 arm_console_boot_init(); 95 96 #if RESET_TO_BL31 97 /* There are no parameters from BL2 if BL31 is a reset vector */ 98 assert(from_bl2 == NULL); 99 assert(plat_params_from_bl2 == NULL); 100 101 # ifdef BL32_BASE 102 /* Populate entry point information for BL32 */ 103 SET_PARAM_HEAD(&bl32_image_ep_info, 104 PARAM_EP, 105 VERSION_1, 106 0); 107 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 108 bl32_image_ep_info.pc = BL32_BASE; 109 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); 110 # endif /* BL32_BASE */ 111 112 /* Populate entry point information for BL33 */ 113 SET_PARAM_HEAD(&bl33_image_ep_info, 114 PARAM_EP, 115 VERSION_1, 116 0); 117 /* 118 * Tell BL31 where the non-trusted software image 119 * is located and the entry state information 120 */ 121 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); 122 123 bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry(); 124 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 125 126 # if ARM_LINUX_KERNEL_AS_BL33 127 /* 128 * According to the file ``Documentation/arm64/booting.txt`` of the 129 * Linux kernel tree, Linux expects the physical address of the device 130 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and 131 * must be 0. 132 */ 133 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE; 134 bl33_image_ep_info.args.arg1 = 0U; 135 bl33_image_ep_info.args.arg2 = 0U; 136 bl33_image_ep_info.args.arg3 = 0U; 137 # endif 138 139 #else /* RESET_TO_BL31 */ 140 141 /* 142 * In debug builds, we pass a special value in 'plat_params_from_bl2' 143 * to verify platform parameters from BL2 to BL31. 144 * In release builds, it's not used. 145 */ 146 assert(((unsigned long long)plat_params_from_bl2) == 147 ARM_BL31_PLAT_PARAM_VAL); 148 149 /* 150 * Check params passed from BL2 should not be NULL, 151 */ 152 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2; 153 assert(params_from_bl2 != NULL); 154 assert(params_from_bl2->h.type == PARAM_BL_PARAMS); 155 assert(params_from_bl2->h.version >= VERSION_2); 156 157 bl_params_node_t *bl_params = params_from_bl2->head; 158 159 /* 160 * Copy BL33 and BL32 (if present), entry point information. 161 * They are stored in Secure RAM, in BL2's address space. 162 */ 163 while (bl_params != NULL) { 164 if (bl_params->image_id == BL32_IMAGE_ID) 165 bl32_image_ep_info = *bl_params->ep_info; 166 167 if (bl_params->image_id == BL33_IMAGE_ID) 168 bl33_image_ep_info = *bl_params->ep_info; 169 170 bl_params = bl_params->next_params_info; 171 } 172 173 if (bl33_image_ep_info.pc == 0U) 174 panic(); 175 #endif /* RESET_TO_BL31 */ 176 } 177 178 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 179 u_register_t arg2, u_register_t arg3) 180 { 181 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); 182 183 /* 184 * Initialize Interconnect for this cluster during cold boot. 185 * No need for locks as no other CPU is active. 186 */ 187 plat_arm_interconnect_init(); 188 189 /* 190 * Enable Interconnect coherency for the primary CPU's cluster. 191 * Earlier bootloader stages might already do this (e.g. Trusted 192 * Firmware's BL1 does it) but we can't assume so. There is no harm in 193 * executing this code twice anyway. 194 * Platform specific PSCI code will enable coherency for other 195 * clusters. 196 */ 197 plat_arm_interconnect_enter_coherency(); 198 } 199 200 /******************************************************************************* 201 * Perform any BL31 platform setup common to ARM standard platforms 202 ******************************************************************************/ 203 void arm_bl31_platform_setup(void) 204 { 205 /* Initialize the GIC driver, cpu and distributor interfaces */ 206 plat_arm_gic_driver_init(); 207 plat_arm_gic_init(); 208 209 #if RESET_TO_BL31 210 /* 211 * Do initial security configuration to allow DRAM/device access 212 * (if earlier BL has not already done so). 213 */ 214 plat_arm_security_setup(); 215 216 #if defined(PLAT_ARM_MEM_PROT_ADDR) 217 arm_nor_psci_do_dyn_mem_protect(); 218 #endif /* PLAT_ARM_MEM_PROT_ADDR */ 219 220 #endif /* RESET_TO_BL31 */ 221 222 /* Enable and initialize the System level generic timer */ 223 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, 224 CNTCR_FCREQ(0U) | CNTCR_EN); 225 226 /* Allow access to the System counter timer module */ 227 arm_configure_sys_timer(); 228 229 /* Initialize power controller before setting up topology */ 230 plat_arm_pwrc_setup(); 231 232 #if RAS_EXTENSION 233 ras_init(); 234 #endif 235 } 236 237 /******************************************************************************* 238 * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM 239 * standard platforms 240 * Perform BL31 platform setup 241 ******************************************************************************/ 242 void arm_bl31_plat_runtime_setup(void) 243 { 244 #if MULTI_CONSOLE_API 245 console_switch_state(CONSOLE_FLAG_RUNTIME); 246 #else 247 console_uninit(); 248 #endif 249 250 /* Initialize the runtime console */ 251 arm_console_runtime_init(); 252 #if RECLAIM_INIT_CODE 253 arm_free_init_memory(); 254 #endif 255 } 256 257 #if RECLAIM_INIT_CODE 258 /* 259 * Zero out and make RW memory used to store image boot time code so it can 260 * be reclaimed during runtime 261 */ 262 void arm_free_init_memory(void) 263 { 264 int ret = xlat_change_mem_attributes(BL_INIT_CODE_BASE, 265 BL_INIT_CODE_END - BL_INIT_CODE_BASE, 266 MT_RW_DATA); 267 268 if (ret != 0) { 269 ERROR("Could not reclaim initialization code"); 270 panic(); 271 } 272 } 273 #endif 274 275 void __init bl31_platform_setup(void) 276 { 277 arm_bl31_platform_setup(); 278 } 279 280 void bl31_plat_runtime_setup(void) 281 { 282 arm_bl31_plat_runtime_setup(); 283 } 284 285 /******************************************************************************* 286 * Perform the very early platform specific architectural setup shared between 287 * ARM standard platforms. This only does basic initialization. Later 288 * architectural setup (bl31_arch_setup()) does not do anything platform 289 * specific. 290 ******************************************************************************/ 291 void __init arm_bl31_plat_arch_setup(void) 292 { 293 const mmap_region_t bl_regions[] = { 294 MAP_BL31_TOTAL, 295 #if RECLAIM_INIT_CODE 296 MAP_BL_INIT_CODE, 297 #endif 298 ARM_MAP_BL_RO, 299 #if USE_ROMLIB 300 ARM_MAP_ROMLIB_CODE, 301 ARM_MAP_ROMLIB_DATA, 302 #endif 303 #if USE_COHERENT_MEM 304 ARM_MAP_BL_COHERENT_RAM, 305 #endif 306 {0} 307 }; 308 309 setup_page_tables(bl_regions, plat_arm_get_mmap()); 310 311 enable_mmu_el3(0); 312 313 arm_setup_romlib(); 314 } 315 316 void __init bl31_plat_arch_setup(void) 317 { 318 arm_bl31_plat_arch_setup(); 319 } 320