xref: /rk3399_ARM-atf/plat/arm/common/arm_bl2u_setup.c (revision ecdc898da3f3c01a4034d875219c61357832c12c)
1dcda29f6SYatharth Kochar /*
2b5fa6563SSandrine Bailleux  * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
3dcda29f6SYatharth Kochar  *
4dcda29f6SYatharth Kochar  * Redistribution and use in source and binary forms, with or without
5dcda29f6SYatharth Kochar  * modification, are permitted provided that the following conditions are met:
6dcda29f6SYatharth Kochar  *
7dcda29f6SYatharth Kochar  * Redistributions of source code must retain the above copyright notice, this
8dcda29f6SYatharth Kochar  * list of conditions and the following disclaimer.
9dcda29f6SYatharth Kochar  *
10dcda29f6SYatharth Kochar  * Redistributions in binary form must reproduce the above copyright notice,
11dcda29f6SYatharth Kochar  * this list of conditions and the following disclaimer in the documentation
12dcda29f6SYatharth Kochar  * and/or other materials provided with the distribution.
13dcda29f6SYatharth Kochar  *
14dcda29f6SYatharth Kochar  * Neither the name of ARM nor the names of its contributors may be used
15dcda29f6SYatharth Kochar  * to endorse or promote products derived from this software without specific
16dcda29f6SYatharth Kochar  * prior written permission.
17dcda29f6SYatharth Kochar  *
18dcda29f6SYatharth Kochar  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19dcda29f6SYatharth Kochar  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20dcda29f6SYatharth Kochar  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21dcda29f6SYatharth Kochar  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22dcda29f6SYatharth Kochar  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23dcda29f6SYatharth Kochar  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24dcda29f6SYatharth Kochar  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25dcda29f6SYatharth Kochar  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26dcda29f6SYatharth Kochar  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27dcda29f6SYatharth Kochar  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28dcda29f6SYatharth Kochar  * POSSIBILITY OF SUCH DAMAGE.
29dcda29f6SYatharth Kochar  */
30dcda29f6SYatharth Kochar 
31dcda29f6SYatharth Kochar #include <arch_helpers.h>
32dcda29f6SYatharth Kochar #include <arm_def.h>
33dcda29f6SYatharth Kochar #include <bl_common.h>
34dcda29f6SYatharth Kochar #include <console.h>
35dcda29f6SYatharth Kochar #include <platform_def.h>
36dcda29f6SYatharth Kochar #include <plat_arm.h>
37dcda29f6SYatharth Kochar #include <string.h>
38dcda29f6SYatharth Kochar 
39dcda29f6SYatharth Kochar #if USE_COHERENT_MEM
40dcda29f6SYatharth Kochar /*
41dcda29f6SYatharth Kochar  * The next 2 constants identify the extents of the coherent memory region.
42dcda29f6SYatharth Kochar  * These addresses are used by the MMU setup code and therefore they must be
43dcda29f6SYatharth Kochar  * page-aligned.  It is the responsibility of the linker script to ensure that
44dcda29f6SYatharth Kochar  * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
45dcda29f6SYatharth Kochar  * page-aligned addresses.
46dcda29f6SYatharth Kochar  */
47dcda29f6SYatharth Kochar #define BL2U_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
48dcda29f6SYatharth Kochar #define BL2U_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
49dcda29f6SYatharth Kochar #endif
50dcda29f6SYatharth Kochar 
51dcda29f6SYatharth Kochar /* Weak definitions may be overridden in specific ARM standard platform */
52dcda29f6SYatharth Kochar #pragma weak bl2u_platform_setup
53dcda29f6SYatharth Kochar #pragma weak bl2u_early_platform_setup
54dcda29f6SYatharth Kochar #pragma weak bl2u_plat_arch_setup
55dcda29f6SYatharth Kochar 
56dcda29f6SYatharth Kochar /*
57dcda29f6SYatharth Kochar  * Perform ARM standard platform setup for BL2U
58dcda29f6SYatharth Kochar  */
59dcda29f6SYatharth Kochar void arm_bl2u_platform_setup(void)
60dcda29f6SYatharth Kochar {
61dcda29f6SYatharth Kochar 	/* Initialize the secure environment */
62dcda29f6SYatharth Kochar 	plat_arm_security_setup();
63dcda29f6SYatharth Kochar }
64dcda29f6SYatharth Kochar 
65dcda29f6SYatharth Kochar void bl2u_platform_setup(void)
66dcda29f6SYatharth Kochar {
67dcda29f6SYatharth Kochar 	arm_bl2u_platform_setup();
68dcda29f6SYatharth Kochar }
69dcda29f6SYatharth Kochar 
70dcda29f6SYatharth Kochar void arm_bl2u_early_platform_setup(meminfo_t *mem_layout, void *plat_info)
71dcda29f6SYatharth Kochar {
72dcda29f6SYatharth Kochar 	/* Initialize the console to provide early debug support */
73dcda29f6SYatharth Kochar 	console_init(PLAT_ARM_BOOT_UART_BASE, PLAT_ARM_BOOT_UART_CLK_IN_HZ,
74dcda29f6SYatharth Kochar 			ARM_CONSOLE_BAUDRATE);
75dcda29f6SYatharth Kochar }
76dcda29f6SYatharth Kochar 
77dcda29f6SYatharth Kochar /*******************************************************************************
78dcda29f6SYatharth Kochar  * BL1 can pass platform dependent information to BL2U in x1.
79dcda29f6SYatharth Kochar  * In case of ARM CSS platforms x1 contains SCP_BL2U image info.
80dcda29f6SYatharth Kochar  * In case of ARM FVP platforms x1 is not used.
81dcda29f6SYatharth Kochar  * In both cases, x0 contains the extents of the memory available to BL2U
82dcda29f6SYatharth Kochar  ******************************************************************************/
83dcda29f6SYatharth Kochar void bl2u_early_platform_setup(meminfo_t *mem_layout, void *plat_info)
84dcda29f6SYatharth Kochar {
85dcda29f6SYatharth Kochar 	arm_bl2u_early_platform_setup(mem_layout, plat_info);
86dcda29f6SYatharth Kochar }
87dcda29f6SYatharth Kochar 
88dcda29f6SYatharth Kochar /*******************************************************************************
89dcda29f6SYatharth Kochar  * Perform the very early platform specific architectural setup here. At the
90dcda29f6SYatharth Kochar  * moment this is only initializes the mmu in a quick and dirty way.
91dcda29f6SYatharth Kochar  * The memory that is used by BL2U is only mapped.
92dcda29f6SYatharth Kochar  ******************************************************************************/
93dcda29f6SYatharth Kochar void arm_bl2u_plat_arch_setup(void)
94dcda29f6SYatharth Kochar {
95b2c96eedSSandrine Bailleux 	arm_setup_page_tables(BL2U_BASE,
96dcda29f6SYatharth Kochar 			      BL31_LIMIT,
970af559a8SSandrine Bailleux 			      BL_CODE_BASE,
98*ecdc898dSMasahiro Yamada 			      BL_CODE_END,
990af559a8SSandrine Bailleux 			      BL_RO_DATA_BASE,
100*ecdc898dSMasahiro Yamada 			      BL_RO_DATA_END
101dcda29f6SYatharth Kochar #if USE_COHERENT_MEM
102dcda29f6SYatharth Kochar 			      ,
103dcda29f6SYatharth Kochar 			      BL2U_COHERENT_RAM_BASE,
104dcda29f6SYatharth Kochar 			      BL2U_COHERENT_RAM_LIMIT
105dcda29f6SYatharth Kochar #endif
106dcda29f6SYatharth Kochar 		);
107b5fa6563SSandrine Bailleux 	enable_mmu_el1(0);
108dcda29f6SYatharth Kochar }
109dcda29f6SYatharth Kochar 
110dcda29f6SYatharth Kochar void bl2u_plat_arch_setup(void)
111dcda29f6SYatharth Kochar {
112dcda29f6SYatharth Kochar 	arm_bl2u_plat_arch_setup();
113dcda29f6SYatharth Kochar }
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