1*dcda29f6SYatharth Kochar /* 2*dcda29f6SYatharth Kochar * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3*dcda29f6SYatharth Kochar * 4*dcda29f6SYatharth Kochar * Redistribution and use in source and binary forms, with or without 5*dcda29f6SYatharth Kochar * modification, are permitted provided that the following conditions are met: 6*dcda29f6SYatharth Kochar * 7*dcda29f6SYatharth Kochar * Redistributions of source code must retain the above copyright notice, this 8*dcda29f6SYatharth Kochar * list of conditions and the following disclaimer. 9*dcda29f6SYatharth Kochar * 10*dcda29f6SYatharth Kochar * Redistributions in binary form must reproduce the above copyright notice, 11*dcda29f6SYatharth Kochar * this list of conditions and the following disclaimer in the documentation 12*dcda29f6SYatharth Kochar * and/or other materials provided with the distribution. 13*dcda29f6SYatharth Kochar * 14*dcda29f6SYatharth Kochar * Neither the name of ARM nor the names of its contributors may be used 15*dcda29f6SYatharth Kochar * to endorse or promote products derived from this software without specific 16*dcda29f6SYatharth Kochar * prior written permission. 17*dcda29f6SYatharth Kochar * 18*dcda29f6SYatharth Kochar * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*dcda29f6SYatharth Kochar * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*dcda29f6SYatharth Kochar * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*dcda29f6SYatharth Kochar * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*dcda29f6SYatharth Kochar * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*dcda29f6SYatharth Kochar * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*dcda29f6SYatharth Kochar * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*dcda29f6SYatharth Kochar * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*dcda29f6SYatharth Kochar * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*dcda29f6SYatharth Kochar * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*dcda29f6SYatharth Kochar * POSSIBILITY OF SUCH DAMAGE. 29*dcda29f6SYatharth Kochar */ 30*dcda29f6SYatharth Kochar 31*dcda29f6SYatharth Kochar #include <arch_helpers.h> 32*dcda29f6SYatharth Kochar #include <arm_def.h> 33*dcda29f6SYatharth Kochar #include <bl_common.h> 34*dcda29f6SYatharth Kochar #include <console.h> 35*dcda29f6SYatharth Kochar #include <platform_def.h> 36*dcda29f6SYatharth Kochar #include <plat_arm.h> 37*dcda29f6SYatharth Kochar #include <string.h> 38*dcda29f6SYatharth Kochar 39*dcda29f6SYatharth Kochar 40*dcda29f6SYatharth Kochar /* 41*dcda29f6SYatharth Kochar * The next 2 constants identify the extents of the code & RO data region. 42*dcda29f6SYatharth Kochar * These addresses are used by the MMU setup code and therefore they must be 43*dcda29f6SYatharth Kochar * page-aligned. It is the responsibility of the linker script to ensure that 44*dcda29f6SYatharth Kochar * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. 45*dcda29f6SYatharth Kochar */ 46*dcda29f6SYatharth Kochar #define BL2U_RO_BASE (unsigned long)(&__RO_START__) 47*dcda29f6SYatharth Kochar #define BL2U_RO_LIMIT (unsigned long)(&__RO_END__) 48*dcda29f6SYatharth Kochar 49*dcda29f6SYatharth Kochar #if USE_COHERENT_MEM 50*dcda29f6SYatharth Kochar /* 51*dcda29f6SYatharth Kochar * The next 2 constants identify the extents of the coherent memory region. 52*dcda29f6SYatharth Kochar * These addresses are used by the MMU setup code and therefore they must be 53*dcda29f6SYatharth Kochar * page-aligned. It is the responsibility of the linker script to ensure that 54*dcda29f6SYatharth Kochar * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to 55*dcda29f6SYatharth Kochar * page-aligned addresses. 56*dcda29f6SYatharth Kochar */ 57*dcda29f6SYatharth Kochar #define BL2U_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) 58*dcda29f6SYatharth Kochar #define BL2U_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) 59*dcda29f6SYatharth Kochar #endif 60*dcda29f6SYatharth Kochar 61*dcda29f6SYatharth Kochar /* Weak definitions may be overridden in specific ARM standard platform */ 62*dcda29f6SYatharth Kochar #pragma weak bl2u_platform_setup 63*dcda29f6SYatharth Kochar #pragma weak bl2u_early_platform_setup 64*dcda29f6SYatharth Kochar #pragma weak bl2u_plat_arch_setup 65*dcda29f6SYatharth Kochar 66*dcda29f6SYatharth Kochar /* 67*dcda29f6SYatharth Kochar * Perform ARM standard platform setup for BL2U 68*dcda29f6SYatharth Kochar */ 69*dcda29f6SYatharth Kochar void arm_bl2u_platform_setup(void) 70*dcda29f6SYatharth Kochar { 71*dcda29f6SYatharth Kochar /* Initialize the secure environment */ 72*dcda29f6SYatharth Kochar plat_arm_security_setup(); 73*dcda29f6SYatharth Kochar } 74*dcda29f6SYatharth Kochar 75*dcda29f6SYatharth Kochar void bl2u_platform_setup(void) 76*dcda29f6SYatharth Kochar { 77*dcda29f6SYatharth Kochar arm_bl2u_platform_setup(); 78*dcda29f6SYatharth Kochar } 79*dcda29f6SYatharth Kochar 80*dcda29f6SYatharth Kochar void arm_bl2u_early_platform_setup(meminfo_t *mem_layout, void *plat_info) 81*dcda29f6SYatharth Kochar { 82*dcda29f6SYatharth Kochar /* Initialize the console to provide early debug support */ 83*dcda29f6SYatharth Kochar console_init(PLAT_ARM_BOOT_UART_BASE, PLAT_ARM_BOOT_UART_CLK_IN_HZ, 84*dcda29f6SYatharth Kochar ARM_CONSOLE_BAUDRATE); 85*dcda29f6SYatharth Kochar } 86*dcda29f6SYatharth Kochar 87*dcda29f6SYatharth Kochar /******************************************************************************* 88*dcda29f6SYatharth Kochar * BL1 can pass platform dependent information to BL2U in x1. 89*dcda29f6SYatharth Kochar * In case of ARM CSS platforms x1 contains SCP_BL2U image info. 90*dcda29f6SYatharth Kochar * In case of ARM FVP platforms x1 is not used. 91*dcda29f6SYatharth Kochar * In both cases, x0 contains the extents of the memory available to BL2U 92*dcda29f6SYatharth Kochar ******************************************************************************/ 93*dcda29f6SYatharth Kochar void bl2u_early_platform_setup(meminfo_t *mem_layout, void *plat_info) 94*dcda29f6SYatharth Kochar { 95*dcda29f6SYatharth Kochar arm_bl2u_early_platform_setup(mem_layout, plat_info); 96*dcda29f6SYatharth Kochar } 97*dcda29f6SYatharth Kochar 98*dcda29f6SYatharth Kochar /******************************************************************************* 99*dcda29f6SYatharth Kochar * Perform the very early platform specific architectural setup here. At the 100*dcda29f6SYatharth Kochar * moment this is only initializes the mmu in a quick and dirty way. 101*dcda29f6SYatharth Kochar * The memory that is used by BL2U is only mapped. 102*dcda29f6SYatharth Kochar ******************************************************************************/ 103*dcda29f6SYatharth Kochar void arm_bl2u_plat_arch_setup(void) 104*dcda29f6SYatharth Kochar { 105*dcda29f6SYatharth Kochar arm_configure_mmu_el1(BL2U_RO_LIMIT, 106*dcda29f6SYatharth Kochar BL31_LIMIT, 107*dcda29f6SYatharth Kochar BL2U_RO_BASE, 108*dcda29f6SYatharth Kochar BL2U_RO_LIMIT 109*dcda29f6SYatharth Kochar #if USE_COHERENT_MEM 110*dcda29f6SYatharth Kochar , 111*dcda29f6SYatharth Kochar BL2U_COHERENT_RAM_BASE, 112*dcda29f6SYatharth Kochar BL2U_COHERENT_RAM_LIMIT 113*dcda29f6SYatharth Kochar #endif 114*dcda29f6SYatharth Kochar ); 115*dcda29f6SYatharth Kochar } 116*dcda29f6SYatharth Kochar 117*dcda29f6SYatharth Kochar void bl2u_plat_arch_setup(void) 118*dcda29f6SYatharth Kochar { 119*dcda29f6SYatharth Kochar arm_bl2u_plat_arch_setup(); 120*dcda29f6SYatharth Kochar } 121