1/* 2 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30#include <asm_macros.S> 31#include <platform_def.h> 32 33 .weak plat_arm_calc_core_pos 34 .weak plat_my_core_pos 35 .globl plat_crash_console_init 36 .globl plat_crash_console_putc 37 .globl platform_mem_init 38 39 40 /* ----------------------------------------------------- 41 * unsigned int plat_my_core_pos(void) 42 * This function uses the plat_arm_calc_core_pos() 43 * definition to get the index of the calling CPU. 44 * ----------------------------------------------------- 45 */ 46func plat_my_core_pos 47 mrs x0, mpidr_el1 48 b plat_arm_calc_core_pos 49endfunc plat_my_core_pos 50 51 /* ----------------------------------------------------- 52 * unsigned int plat_arm_calc_core_pos(u_register_t mpidr) 53 * Helper function to calculate the core position. 54 * With this function: CorePos = (ClusterId * 4) + 55 * CoreId 56 * ----------------------------------------------------- 57 */ 58func plat_arm_calc_core_pos 59 and x1, x0, #MPIDR_CPU_MASK 60 and x0, x0, #MPIDR_CLUSTER_MASK 61 add x0, x1, x0, LSR #6 62 ret 63endfunc plat_arm_calc_core_pos 64 65 /* --------------------------------------------- 66 * int plat_crash_console_init(void) 67 * Function to initialize the crash console 68 * without a C Runtime to print crash report. 69 * Clobber list : x0 - x4 70 * --------------------------------------------- 71 */ 72func plat_crash_console_init 73 mov_imm x0, PLAT_ARM_CRASH_UART_BASE 74 mov_imm x1, PLAT_ARM_CRASH_UART_CLK_IN_HZ 75 mov_imm x2, ARM_CONSOLE_BAUDRATE 76 b console_core_init 77endfunc plat_crash_console_init 78 79 /* --------------------------------------------- 80 * int plat_crash_console_putc(int c) 81 * Function to print a character on the crash 82 * console without a C Runtime. 83 * Clobber list : x1, x2 84 * --------------------------------------------- 85 */ 86func plat_crash_console_putc 87 mov_imm x1, PLAT_ARM_CRASH_UART_BASE 88 b console_core_putc 89endfunc plat_crash_console_putc 90 91 /* --------------------------------------------------------------------- 92 * We don't need to carry out any memory initialization on ARM 93 * platforms. The Secure RAM is accessible straight away. 94 * --------------------------------------------------------------------- 95 */ 96func platform_mem_init 97 ret 98endfunc platform_mem_init 99