1b4315306SDan Handley/* 2801cf93cSAntonio Nino Diaz * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3b4315306SDan Handley * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5b4315306SDan Handley */ 6b4315306SDan Handley#include <asm_macros.S> 7b4315306SDan Handley#include <platform_def.h> 8b4315306SDan Handley 938dce70fSSoby Mathew .weak plat_arm_calc_core_pos 1038dce70fSSoby Mathew .weak plat_my_core_pos 11b4315306SDan Handley .globl plat_crash_console_init 12b4315306SDan Handley .globl plat_crash_console_putc 13801cf93cSAntonio Nino Diaz .globl plat_crash_console_flush 14a6bd5ffbSSandrine Bailleux .globl platform_mem_init 15*d832aee9Sdp-arm .globl arm_disable_spe 16b4315306SDan Handley 17b4315306SDan Handley 1838dce70fSSoby Mathew /* ----------------------------------------------------- 1938dce70fSSoby Mathew * unsigned int plat_my_core_pos(void) 2038dce70fSSoby Mathew * This function uses the plat_arm_calc_core_pos() 2138dce70fSSoby Mathew * definition to get the index of the calling CPU. 2238dce70fSSoby Mathew * ----------------------------------------------------- 2338dce70fSSoby Mathew */ 2438dce70fSSoby Mathewfunc plat_my_core_pos 2538dce70fSSoby Mathew mrs x0, mpidr_el1 2638dce70fSSoby Mathew b plat_arm_calc_core_pos 2738dce70fSSoby Mathewendfunc plat_my_core_pos 2838dce70fSSoby Mathew 2938dce70fSSoby Mathew /* ----------------------------------------------------- 304c0d0390SSoby Mathew * unsigned int plat_arm_calc_core_pos(u_register_t mpidr) 3138dce70fSSoby Mathew * Helper function to calculate the core position. 3238dce70fSSoby Mathew * With this function: CorePos = (ClusterId * 4) + 3338dce70fSSoby Mathew * CoreId 3438dce70fSSoby Mathew * ----------------------------------------------------- 3538dce70fSSoby Mathew */ 3638dce70fSSoby Mathewfunc plat_arm_calc_core_pos 3738dce70fSSoby Mathew and x1, x0, #MPIDR_CPU_MASK 3838dce70fSSoby Mathew and x0, x0, #MPIDR_CLUSTER_MASK 3938dce70fSSoby Mathew add x0, x1, x0, LSR #6 4038dce70fSSoby Mathew ret 4138dce70fSSoby Mathewendfunc plat_arm_calc_core_pos 4238dce70fSSoby Mathew 43b4315306SDan Handley /* --------------------------------------------- 44b4315306SDan Handley * int plat_crash_console_init(void) 45b4315306SDan Handley * Function to initialize the crash console 46b4315306SDan Handley * without a C Runtime to print crash report. 479400b40eSJuan Castillo * Clobber list : x0 - x4 48b4315306SDan Handley * --------------------------------------------- 49b4315306SDan Handley */ 50b4315306SDan Handleyfunc plat_crash_console_init 51b4315306SDan Handley mov_imm x0, PLAT_ARM_CRASH_UART_BASE 52b4315306SDan Handley mov_imm x1, PLAT_ARM_CRASH_UART_CLK_IN_HZ 53b4315306SDan Handley mov_imm x2, ARM_CONSOLE_BAUDRATE 54b4315306SDan Handley b console_core_init 55b4315306SDan Handleyendfunc plat_crash_console_init 56b4315306SDan Handley 57b4315306SDan Handley /* --------------------------------------------- 58b4315306SDan Handley * int plat_crash_console_putc(int c) 59b4315306SDan Handley * Function to print a character on the crash 60b4315306SDan Handley * console without a C Runtime. 61b4315306SDan Handley * Clobber list : x1, x2 62b4315306SDan Handley * --------------------------------------------- 63b4315306SDan Handley */ 64b4315306SDan Handleyfunc plat_crash_console_putc 65b4315306SDan Handley mov_imm x1, PLAT_ARM_CRASH_UART_BASE 66b4315306SDan Handley b console_core_putc 67b4315306SDan Handleyendfunc plat_crash_console_putc 68a6bd5ffbSSandrine Bailleux 69801cf93cSAntonio Nino Diaz /* --------------------------------------------- 70801cf93cSAntonio Nino Diaz * int plat_crash_console_flush() 71801cf93cSAntonio Nino Diaz * Function to force a write of all buffered 72801cf93cSAntonio Nino Diaz * data that hasn't been output. 73801cf93cSAntonio Nino Diaz * Out : return -1 on error else return 0. 74801cf93cSAntonio Nino Diaz * Clobber list : r0 - r1 75801cf93cSAntonio Nino Diaz * --------------------------------------------- 76801cf93cSAntonio Nino Diaz */ 77801cf93cSAntonio Nino Diazfunc plat_crash_console_flush 78801cf93cSAntonio Nino Diaz mov_imm x1, PLAT_ARM_CRASH_UART_BASE 79801cf93cSAntonio Nino Diaz b console_core_flush 80801cf93cSAntonio Nino Diazendfunc plat_crash_console_flush 81801cf93cSAntonio Nino Diaz 82a6bd5ffbSSandrine Bailleux /* --------------------------------------------------------------------- 83a6bd5ffbSSandrine Bailleux * We don't need to carry out any memory initialization on ARM 84a6bd5ffbSSandrine Bailleux * platforms. The Secure RAM is accessible straight away. 85a6bd5ffbSSandrine Bailleux * --------------------------------------------------------------------- 86a6bd5ffbSSandrine Bailleux */ 87a6bd5ffbSSandrine Bailleuxfunc platform_mem_init 88a6bd5ffbSSandrine Bailleux ret 89a6bd5ffbSSandrine Bailleuxendfunc platform_mem_init 90*d832aee9Sdp-arm 91*d832aee9Sdp-arm /* ----------------------------------------------------- 92*d832aee9Sdp-arm * void arm_disable_spe (void); 93*d832aee9Sdp-arm * ----------------------------------------------------- 94*d832aee9Sdp-arm */ 95*d832aee9Sdp-arm#if ENABLE_SPE_FOR_LOWER_ELS 96*d832aee9Sdp-armfunc arm_disable_spe 97*d832aee9Sdp-arm /* Detect if SPE is implemented */ 98*d832aee9Sdp-arm mrs x0, id_aa64dfr0_el1 99*d832aee9Sdp-arm ubfx x0, x0, #ID_AA64DFR0_PMS_SHIFT, #ID_AA64DFR0_PMS_LENGTH 100*d832aee9Sdp-arm cmp x0, #0x1 101*d832aee9Sdp-arm b.ne 1f 102*d832aee9Sdp-arm 103*d832aee9Sdp-arm /* Drain buffered data */ 104*d832aee9Sdp-arm .arch armv8.2-a+profile 105*d832aee9Sdp-arm psb csync 106*d832aee9Sdp-arm dsb nsh 107*d832aee9Sdp-arm 108*d832aee9Sdp-arm /* Disable Profiling Buffer */ 109*d832aee9Sdp-arm mrs x0, pmblimitr_el1 110*d832aee9Sdp-arm bic x0, x0, #1 111*d832aee9Sdp-arm msr pmblimitr_el1, x0 112*d832aee9Sdp-arm isb 113*d832aee9Sdp-arm .arch armv8-a 114*d832aee9Sdp-arm1: 115*d832aee9Sdp-arm ret 116*d832aee9Sdp-armendfunc arm_disable_spe 117*d832aee9Sdp-arm#endif 118