xref: /rk3399_ARM-atf/plat/arm/common/aarch64/arm_helpers.S (revision 82cb2c1ad9897473743f08437d0a3995bed561b9)
1b4315306SDan Handley/*
2801cf93cSAntonio Nino Diaz * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
3b4315306SDan Handley *
4*82cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause
5b4315306SDan Handley */
6b4315306SDan Handley#include <asm_macros.S>
7b4315306SDan Handley#include <platform_def.h>
8b4315306SDan Handley
938dce70fSSoby Mathew	.weak	plat_arm_calc_core_pos
1038dce70fSSoby Mathew	.weak	plat_my_core_pos
11b4315306SDan Handley	.globl	plat_crash_console_init
12b4315306SDan Handley	.globl	plat_crash_console_putc
13801cf93cSAntonio Nino Diaz	.globl	plat_crash_console_flush
14a6bd5ffbSSandrine Bailleux	.globl	platform_mem_init
15b4315306SDan Handley
16b4315306SDan Handley
1738dce70fSSoby Mathew	/* -----------------------------------------------------
1838dce70fSSoby Mathew	 *  unsigned int plat_my_core_pos(void)
1938dce70fSSoby Mathew	 *  This function uses the plat_arm_calc_core_pos()
2038dce70fSSoby Mathew	 *  definition to get the index of the calling CPU.
2138dce70fSSoby Mathew	 * -----------------------------------------------------
2238dce70fSSoby Mathew	 */
2338dce70fSSoby Mathewfunc plat_my_core_pos
2438dce70fSSoby Mathew	mrs	x0, mpidr_el1
2538dce70fSSoby Mathew	b	plat_arm_calc_core_pos
2638dce70fSSoby Mathewendfunc plat_my_core_pos
2738dce70fSSoby Mathew
2838dce70fSSoby Mathew	/* -----------------------------------------------------
294c0d0390SSoby Mathew	 *  unsigned int plat_arm_calc_core_pos(u_register_t mpidr)
3038dce70fSSoby Mathew	 *  Helper function to calculate the core position.
3138dce70fSSoby Mathew	 *  With this function: CorePos = (ClusterId * 4) +
3238dce70fSSoby Mathew	 *  				  CoreId
3338dce70fSSoby Mathew	 * -----------------------------------------------------
3438dce70fSSoby Mathew	 */
3538dce70fSSoby Mathewfunc plat_arm_calc_core_pos
3638dce70fSSoby Mathew	and	x1, x0, #MPIDR_CPU_MASK
3738dce70fSSoby Mathew	and	x0, x0, #MPIDR_CLUSTER_MASK
3838dce70fSSoby Mathew	add	x0, x1, x0, LSR #6
3938dce70fSSoby Mathew	ret
4038dce70fSSoby Mathewendfunc plat_arm_calc_core_pos
4138dce70fSSoby Mathew
42b4315306SDan Handley	/* ---------------------------------------------
43b4315306SDan Handley	 * int plat_crash_console_init(void)
44b4315306SDan Handley	 * Function to initialize the crash console
45b4315306SDan Handley	 * without a C Runtime to print crash report.
469400b40eSJuan Castillo	 * Clobber list : x0 - x4
47b4315306SDan Handley	 * ---------------------------------------------
48b4315306SDan Handley	 */
49b4315306SDan Handleyfunc plat_crash_console_init
50b4315306SDan Handley	mov_imm	x0, PLAT_ARM_CRASH_UART_BASE
51b4315306SDan Handley	mov_imm	x1, PLAT_ARM_CRASH_UART_CLK_IN_HZ
52b4315306SDan Handley	mov_imm	x2, ARM_CONSOLE_BAUDRATE
53b4315306SDan Handley	b	console_core_init
54b4315306SDan Handleyendfunc plat_crash_console_init
55b4315306SDan Handley
56b4315306SDan Handley	/* ---------------------------------------------
57b4315306SDan Handley	 * int plat_crash_console_putc(int c)
58b4315306SDan Handley	 * Function to print a character on the crash
59b4315306SDan Handley	 * console without a C Runtime.
60b4315306SDan Handley	 * Clobber list : x1, x2
61b4315306SDan Handley	 * ---------------------------------------------
62b4315306SDan Handley	 */
63b4315306SDan Handleyfunc plat_crash_console_putc
64b4315306SDan Handley	mov_imm	x1, PLAT_ARM_CRASH_UART_BASE
65b4315306SDan Handley	b	console_core_putc
66b4315306SDan Handleyendfunc plat_crash_console_putc
67a6bd5ffbSSandrine Bailleux
68801cf93cSAntonio Nino Diaz	/* ---------------------------------------------
69801cf93cSAntonio Nino Diaz	 * int plat_crash_console_flush()
70801cf93cSAntonio Nino Diaz	 * Function to force a write of all buffered
71801cf93cSAntonio Nino Diaz	 * data that hasn't been output.
72801cf93cSAntonio Nino Diaz	 * Out : return -1 on error else return 0.
73801cf93cSAntonio Nino Diaz	 * Clobber list : r0 - r1
74801cf93cSAntonio Nino Diaz	 * ---------------------------------------------
75801cf93cSAntonio Nino Diaz	 */
76801cf93cSAntonio Nino Diazfunc plat_crash_console_flush
77801cf93cSAntonio Nino Diaz	mov_imm	x1, PLAT_ARM_CRASH_UART_BASE
78801cf93cSAntonio Nino Diaz	b	console_core_flush
79801cf93cSAntonio Nino Diazendfunc plat_crash_console_flush
80801cf93cSAntonio Nino Diaz
81a6bd5ffbSSandrine Bailleux	/* ---------------------------------------------------------------------
82a6bd5ffbSSandrine Bailleux	 * We don't need to carry out any memory initialization on ARM
83a6bd5ffbSSandrine Bailleux	 * platforms. The Secure RAM is accessible straight away.
84a6bd5ffbSSandrine Bailleux	 * ---------------------------------------------------------------------
85a6bd5ffbSSandrine Bailleux	 */
86a6bd5ffbSSandrine Bailleuxfunc platform_mem_init
87a6bd5ffbSSandrine Bailleux	ret
88a6bd5ffbSSandrine Bailleuxendfunc platform_mem_init
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