xref: /rk3399_ARM-atf/plat/arm/common/aarch64/arm_helpers.S (revision 801cf93c48585a83fda5d576b25c7b7f3cd59259)
1b4315306SDan Handley/*
2*801cf93cSAntonio Nino Diaz * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
3b4315306SDan Handley *
4b4315306SDan Handley * Redistribution and use in source and binary forms, with or without
5b4315306SDan Handley * modification, are permitted provided that the following conditions are met:
6b4315306SDan Handley *
7b4315306SDan Handley * Redistributions of source code must retain the above copyright notice, this
8b4315306SDan Handley * list of conditions and the following disclaimer.
9b4315306SDan Handley *
10b4315306SDan Handley * Redistributions in binary form must reproduce the above copyright notice,
11b4315306SDan Handley * this list of conditions and the following disclaimer in the documentation
12b4315306SDan Handley * and/or other materials provided with the distribution.
13b4315306SDan Handley *
14b4315306SDan Handley * Neither the name of ARM nor the names of its contributors may be used
15b4315306SDan Handley * to endorse or promote products derived from this software without specific
16b4315306SDan Handley * prior written permission.
17b4315306SDan Handley *
18b4315306SDan Handley * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19b4315306SDan Handley * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20b4315306SDan Handley * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21b4315306SDan Handley * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22b4315306SDan Handley * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23b4315306SDan Handley * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24b4315306SDan Handley * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25b4315306SDan Handley * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26b4315306SDan Handley * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27b4315306SDan Handley * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28b4315306SDan Handley * POSSIBILITY OF SUCH DAMAGE.
29b4315306SDan Handley */
30b4315306SDan Handley#include <asm_macros.S>
31b4315306SDan Handley#include <platform_def.h>
32b4315306SDan Handley
3338dce70fSSoby Mathew	.weak	plat_arm_calc_core_pos
3438dce70fSSoby Mathew	.weak	plat_my_core_pos
35b4315306SDan Handley	.globl	plat_crash_console_init
36b4315306SDan Handley	.globl	plat_crash_console_putc
37*801cf93cSAntonio Nino Diaz	.globl	plat_crash_console_flush
38a6bd5ffbSSandrine Bailleux	.globl	platform_mem_init
39b4315306SDan Handley
40b4315306SDan Handley
4138dce70fSSoby Mathew	/* -----------------------------------------------------
4238dce70fSSoby Mathew	 *  unsigned int plat_my_core_pos(void)
4338dce70fSSoby Mathew	 *  This function uses the plat_arm_calc_core_pos()
4438dce70fSSoby Mathew	 *  definition to get the index of the calling CPU.
4538dce70fSSoby Mathew	 * -----------------------------------------------------
4638dce70fSSoby Mathew	 */
4738dce70fSSoby Mathewfunc plat_my_core_pos
4838dce70fSSoby Mathew	mrs	x0, mpidr_el1
4938dce70fSSoby Mathew	b	plat_arm_calc_core_pos
5038dce70fSSoby Mathewendfunc plat_my_core_pos
5138dce70fSSoby Mathew
5238dce70fSSoby Mathew	/* -----------------------------------------------------
534c0d0390SSoby Mathew	 *  unsigned int plat_arm_calc_core_pos(u_register_t mpidr)
5438dce70fSSoby Mathew	 *  Helper function to calculate the core position.
5538dce70fSSoby Mathew	 *  With this function: CorePos = (ClusterId * 4) +
5638dce70fSSoby Mathew	 *  				  CoreId
5738dce70fSSoby Mathew	 * -----------------------------------------------------
5838dce70fSSoby Mathew	 */
5938dce70fSSoby Mathewfunc plat_arm_calc_core_pos
6038dce70fSSoby Mathew	and	x1, x0, #MPIDR_CPU_MASK
6138dce70fSSoby Mathew	and	x0, x0, #MPIDR_CLUSTER_MASK
6238dce70fSSoby Mathew	add	x0, x1, x0, LSR #6
6338dce70fSSoby Mathew	ret
6438dce70fSSoby Mathewendfunc plat_arm_calc_core_pos
6538dce70fSSoby Mathew
66b4315306SDan Handley	/* ---------------------------------------------
67b4315306SDan Handley	 * int plat_crash_console_init(void)
68b4315306SDan Handley	 * Function to initialize the crash console
69b4315306SDan Handley	 * without a C Runtime to print crash report.
709400b40eSJuan Castillo	 * Clobber list : x0 - x4
71b4315306SDan Handley	 * ---------------------------------------------
72b4315306SDan Handley	 */
73b4315306SDan Handleyfunc plat_crash_console_init
74b4315306SDan Handley	mov_imm	x0, PLAT_ARM_CRASH_UART_BASE
75b4315306SDan Handley	mov_imm	x1, PLAT_ARM_CRASH_UART_CLK_IN_HZ
76b4315306SDan Handley	mov_imm	x2, ARM_CONSOLE_BAUDRATE
77b4315306SDan Handley	b	console_core_init
78b4315306SDan Handleyendfunc plat_crash_console_init
79b4315306SDan Handley
80b4315306SDan Handley	/* ---------------------------------------------
81b4315306SDan Handley	 * int plat_crash_console_putc(int c)
82b4315306SDan Handley	 * Function to print a character on the crash
83b4315306SDan Handley	 * console without a C Runtime.
84b4315306SDan Handley	 * Clobber list : x1, x2
85b4315306SDan Handley	 * ---------------------------------------------
86b4315306SDan Handley	 */
87b4315306SDan Handleyfunc plat_crash_console_putc
88b4315306SDan Handley	mov_imm	x1, PLAT_ARM_CRASH_UART_BASE
89b4315306SDan Handley	b	console_core_putc
90b4315306SDan Handleyendfunc plat_crash_console_putc
91a6bd5ffbSSandrine Bailleux
92*801cf93cSAntonio Nino Diaz	/* ---------------------------------------------
93*801cf93cSAntonio Nino Diaz	 * int plat_crash_console_flush()
94*801cf93cSAntonio Nino Diaz	 * Function to force a write of all buffered
95*801cf93cSAntonio Nino Diaz	 * data that hasn't been output.
96*801cf93cSAntonio Nino Diaz	 * Out : return -1 on error else return 0.
97*801cf93cSAntonio Nino Diaz	 * Clobber list : r0 - r1
98*801cf93cSAntonio Nino Diaz	 * ---------------------------------------------
99*801cf93cSAntonio Nino Diaz	 */
100*801cf93cSAntonio Nino Diazfunc plat_crash_console_flush
101*801cf93cSAntonio Nino Diaz	mov_imm	x1, PLAT_ARM_CRASH_UART_BASE
102*801cf93cSAntonio Nino Diaz	b	console_core_flush
103*801cf93cSAntonio Nino Diazendfunc plat_crash_console_flush
104*801cf93cSAntonio Nino Diaz
105a6bd5ffbSSandrine Bailleux	/* ---------------------------------------------------------------------
106a6bd5ffbSSandrine Bailleux	 * We don't need to carry out any memory initialization on ARM
107a6bd5ffbSSandrine Bailleux	 * platforms. The Secure RAM is accessible straight away.
108a6bd5ffbSSandrine Bailleux	 * ---------------------------------------------------------------------
109a6bd5ffbSSandrine Bailleux	 */
110a6bd5ffbSSandrine Bailleuxfunc platform_mem_init
111a6bd5ffbSSandrine Bailleux	ret
112a6bd5ffbSSandrine Bailleuxendfunc platform_mem_init
113