xref: /rk3399_ARM-atf/plat/arm/common/aarch32/arm_helpers.S (revision e12cb61f0e7d8678a2cd6ef73f0a38af1d460e08)
1877cf3ffSSoby Mathew/*
2877cf3ffSSoby Mathew * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3877cf3ffSSoby Mathew *
4877cf3ffSSoby Mathew * Redistribution and use in source and binary forms, with or without
5877cf3ffSSoby Mathew * modification, are permitted provided that the following conditions are met:
6877cf3ffSSoby Mathew *
7877cf3ffSSoby Mathew * Redistributions of source code must retain the above copyright notice, this
8877cf3ffSSoby Mathew * list of conditions and the following disclaimer.
9877cf3ffSSoby Mathew *
10877cf3ffSSoby Mathew * Redistributions in binary form must reproduce the above copyright notice,
11877cf3ffSSoby Mathew * this list of conditions and the following disclaimer in the documentation
12877cf3ffSSoby Mathew * and/or other materials provided with the distribution.
13877cf3ffSSoby Mathew *
14877cf3ffSSoby Mathew * Neither the name of ARM nor the names of its contributors may be used
15877cf3ffSSoby Mathew * to endorse or promote products derived from this software without specific
16877cf3ffSSoby Mathew * prior written permission.
17877cf3ffSSoby Mathew *
18877cf3ffSSoby Mathew * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19877cf3ffSSoby Mathew * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20877cf3ffSSoby Mathew * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21877cf3ffSSoby Mathew * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22877cf3ffSSoby Mathew * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23877cf3ffSSoby Mathew * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24877cf3ffSSoby Mathew * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25877cf3ffSSoby Mathew * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26877cf3ffSSoby Mathew * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27877cf3ffSSoby Mathew * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28877cf3ffSSoby Mathew * POSSIBILITY OF SUCH DAMAGE.
29877cf3ffSSoby Mathew */
30877cf3ffSSoby Mathew#include <asm_macros.S>
31877cf3ffSSoby Mathew#include <platform_def.h>
32877cf3ffSSoby Mathew
33877cf3ffSSoby Mathew	.weak	plat_arm_calc_core_pos
34*e12cb61fSJeenu Viswambharan	.weak	plat_crash_console_init
35*e12cb61fSJeenu Viswambharan	.weak	plat_crash_console_putc
36877cf3ffSSoby Mathew	.weak	plat_my_core_pos
37877cf3ffSSoby Mathew
38877cf3ffSSoby Mathew	/* -----------------------------------------------------
39877cf3ffSSoby Mathew	 *  unsigned int plat_my_core_pos(void)
40877cf3ffSSoby Mathew	 *  This function uses the plat_arm_calc_core_pos()
41877cf3ffSSoby Mathew	 *  definition to get the index of the calling CPU.
42877cf3ffSSoby Mathew	 * -----------------------------------------------------
43877cf3ffSSoby Mathew	 */
44877cf3ffSSoby Mathewfunc plat_my_core_pos
45877cf3ffSSoby Mathew	ldcopr	r0, MPIDR
46877cf3ffSSoby Mathew	b	plat_arm_calc_core_pos
47877cf3ffSSoby Mathewendfunc plat_my_core_pos
48877cf3ffSSoby Mathew
49877cf3ffSSoby Mathew	/* -----------------------------------------------------
50877cf3ffSSoby Mathew	 *  unsigned int plat_arm_calc_core_pos(uint64_t mpidr)
51877cf3ffSSoby Mathew	 *  Helper function to calculate the core position.
52877cf3ffSSoby Mathew	 *  With this function: CorePos = (ClusterId * 4) +
53877cf3ffSSoby Mathew	 *  				  CoreId
54877cf3ffSSoby Mathew	 * -----------------------------------------------------
55877cf3ffSSoby Mathew	 */
56877cf3ffSSoby Mathewfunc plat_arm_calc_core_pos
57877cf3ffSSoby Mathew	and	r1, r0, #MPIDR_CPU_MASK
58877cf3ffSSoby Mathew	and	r0, r0, #MPIDR_CLUSTER_MASK
59877cf3ffSSoby Mathew	add	r0, r1, r0, LSR #6
60877cf3ffSSoby Mathew	bx	lr
61877cf3ffSSoby Mathewendfunc plat_arm_calc_core_pos
62*e12cb61fSJeenu Viswambharan
63*e12cb61fSJeenu Viswambharan	/* ---------------------------------------------
64*e12cb61fSJeenu Viswambharan	 * int plat_crash_console_init(void)
65*e12cb61fSJeenu Viswambharan	 * Function to initialize the crash console
66*e12cb61fSJeenu Viswambharan	 * without a C Runtime to print crash report.
67*e12cb61fSJeenu Viswambharan	 * Clobber list : r0 - r3
68*e12cb61fSJeenu Viswambharan	 * ---------------------------------------------
69*e12cb61fSJeenu Viswambharan	 */
70*e12cb61fSJeenu Viswambharanfunc plat_crash_console_init
71*e12cb61fSJeenu Viswambharan	ldr	r0, =PLAT_ARM_CRASH_UART_BASE
72*e12cb61fSJeenu Viswambharan	ldr	r1, =PLAT_ARM_CRASH_UART_CLK_IN_HZ
73*e12cb61fSJeenu Viswambharan	ldr	r2, =ARM_CONSOLE_BAUDRATE
74*e12cb61fSJeenu Viswambharan	b	console_core_init
75*e12cb61fSJeenu Viswambharanendfunc plat_crash_console_init
76*e12cb61fSJeenu Viswambharan
77*e12cb61fSJeenu Viswambharan	/* ---------------------------------------------
78*e12cb61fSJeenu Viswambharan	 * int plat_crash_console_putc(int c)
79*e12cb61fSJeenu Viswambharan	 * Function to print a character on the crash
80*e12cb61fSJeenu Viswambharan	 * console without a C Runtime.
81*e12cb61fSJeenu Viswambharan	 * Clobber list : r1 - r2
82*e12cb61fSJeenu Viswambharan	 * ---------------------------------------------
83*e12cb61fSJeenu Viswambharan	 */
84*e12cb61fSJeenu Viswambharanfunc plat_crash_console_putc
85*e12cb61fSJeenu Viswambharan	ldr	r1, =PLAT_ARM_CRASH_UART_BASE
86*e12cb61fSJeenu Viswambharan	b	console_core_putc
87*e12cb61fSJeenu Viswambharanendfunc plat_crash_console_putc
88