xref: /rk3399_ARM-atf/plat/arm/common/aarch32/arm_helpers.S (revision 877cf3ff12fc6b71ea44e2a4bad2b9303298433c)
1*877cf3ffSSoby Mathew/*
2*877cf3ffSSoby Mathew * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3*877cf3ffSSoby Mathew *
4*877cf3ffSSoby Mathew * Redistribution and use in source and binary forms, with or without
5*877cf3ffSSoby Mathew * modification, are permitted provided that the following conditions are met:
6*877cf3ffSSoby Mathew *
7*877cf3ffSSoby Mathew * Redistributions of source code must retain the above copyright notice, this
8*877cf3ffSSoby Mathew * list of conditions and the following disclaimer.
9*877cf3ffSSoby Mathew *
10*877cf3ffSSoby Mathew * Redistributions in binary form must reproduce the above copyright notice,
11*877cf3ffSSoby Mathew * this list of conditions and the following disclaimer in the documentation
12*877cf3ffSSoby Mathew * and/or other materials provided with the distribution.
13*877cf3ffSSoby Mathew *
14*877cf3ffSSoby Mathew * Neither the name of ARM nor the names of its contributors may be used
15*877cf3ffSSoby Mathew * to endorse or promote products derived from this software without specific
16*877cf3ffSSoby Mathew * prior written permission.
17*877cf3ffSSoby Mathew *
18*877cf3ffSSoby Mathew * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19*877cf3ffSSoby Mathew * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20*877cf3ffSSoby Mathew * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21*877cf3ffSSoby Mathew * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22*877cf3ffSSoby Mathew * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23*877cf3ffSSoby Mathew * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24*877cf3ffSSoby Mathew * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25*877cf3ffSSoby Mathew * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26*877cf3ffSSoby Mathew * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27*877cf3ffSSoby Mathew * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28*877cf3ffSSoby Mathew * POSSIBILITY OF SUCH DAMAGE.
29*877cf3ffSSoby Mathew */
30*877cf3ffSSoby Mathew#include <asm_macros.S>
31*877cf3ffSSoby Mathew#include <platform_def.h>
32*877cf3ffSSoby Mathew
33*877cf3ffSSoby Mathew	.weak	plat_arm_calc_core_pos
34*877cf3ffSSoby Mathew	.weak	plat_my_core_pos
35*877cf3ffSSoby Mathew
36*877cf3ffSSoby Mathew	/* -----------------------------------------------------
37*877cf3ffSSoby Mathew	 *  unsigned int plat_my_core_pos(void)
38*877cf3ffSSoby Mathew	 *  This function uses the plat_arm_calc_core_pos()
39*877cf3ffSSoby Mathew	 *  definition to get the index of the calling CPU.
40*877cf3ffSSoby Mathew	 * -----------------------------------------------------
41*877cf3ffSSoby Mathew	 */
42*877cf3ffSSoby Mathewfunc plat_my_core_pos
43*877cf3ffSSoby Mathew	ldcopr	r0, MPIDR
44*877cf3ffSSoby Mathew	b	plat_arm_calc_core_pos
45*877cf3ffSSoby Mathewendfunc plat_my_core_pos
46*877cf3ffSSoby Mathew
47*877cf3ffSSoby Mathew	/* -----------------------------------------------------
48*877cf3ffSSoby Mathew	 *  unsigned int plat_arm_calc_core_pos(uint64_t mpidr)
49*877cf3ffSSoby Mathew	 *  Helper function to calculate the core position.
50*877cf3ffSSoby Mathew	 *  With this function: CorePos = (ClusterId * 4) +
51*877cf3ffSSoby Mathew	 *  				  CoreId
52*877cf3ffSSoby Mathew	 * -----------------------------------------------------
53*877cf3ffSSoby Mathew	 */
54*877cf3ffSSoby Mathewfunc plat_arm_calc_core_pos
55*877cf3ffSSoby Mathew	and	r1, r0, #MPIDR_CPU_MASK
56*877cf3ffSSoby Mathew	and	r0, r0, #MPIDR_CLUSTER_MASK
57*877cf3ffSSoby Mathew	add	r0, r1, r0, LSR #6
58*877cf3ffSSoby Mathew	bx	lr
59*877cf3ffSSoby Mathewendfunc plat_arm_calc_core_pos
60