1877cf3ffSSoby Mathew/* 2*831b0e98SJimmy Brisson * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. 3877cf3ffSSoby Mathew * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5877cf3ffSSoby Mathew */ 6877cf3ffSSoby Mathew#include <asm_macros.S> 7877cf3ffSSoby Mathew#include <platform_def.h> 8877cf3ffSSoby Mathew 9877cf3ffSSoby Mathew .weak plat_arm_calc_core_pos 10877cf3ffSSoby Mathew .weak plat_my_core_pos 11801cf93cSAntonio Nino Diaz .globl plat_crash_console_init 12801cf93cSAntonio Nino Diaz .globl plat_crash_console_putc 13801cf93cSAntonio Nino Diaz .globl plat_crash_console_flush 14877cf3ffSSoby Mathew 15877cf3ffSSoby Mathew /* ----------------------------------------------------- 16877cf3ffSSoby Mathew * unsigned int plat_my_core_pos(void) 17877cf3ffSSoby Mathew * This function uses the plat_arm_calc_core_pos() 18877cf3ffSSoby Mathew * definition to get the index of the calling CPU. 19877cf3ffSSoby Mathew * ----------------------------------------------------- 20877cf3ffSSoby Mathew */ 21877cf3ffSSoby Mathewfunc plat_my_core_pos 22877cf3ffSSoby Mathew ldcopr r0, MPIDR 23877cf3ffSSoby Mathew b plat_arm_calc_core_pos 24877cf3ffSSoby Mathewendfunc plat_my_core_pos 25877cf3ffSSoby Mathew 26877cf3ffSSoby Mathew /* ----------------------------------------------------- 27877cf3ffSSoby Mathew * unsigned int plat_arm_calc_core_pos(uint64_t mpidr) 28877cf3ffSSoby Mathew * Helper function to calculate the core position. 29877cf3ffSSoby Mathew * With this function: CorePos = (ClusterId * 4) + 30877cf3ffSSoby Mathew * CoreId 31877cf3ffSSoby Mathew * ----------------------------------------------------- 32877cf3ffSSoby Mathew */ 33877cf3ffSSoby Mathewfunc plat_arm_calc_core_pos 34877cf3ffSSoby Mathew and r1, r0, #MPIDR_CPU_MASK 35877cf3ffSSoby Mathew and r0, r0, #MPIDR_CLUSTER_MASK 36877cf3ffSSoby Mathew add r0, r1, r0, LSR #6 37877cf3ffSSoby Mathew bx lr 38877cf3ffSSoby Mathewendfunc plat_arm_calc_core_pos 39e12cb61fSJeenu Viswambharan 40e12cb61fSJeenu Viswambharan /* --------------------------------------------- 41e12cb61fSJeenu Viswambharan * int plat_crash_console_init(void) 42e12cb61fSJeenu Viswambharan * Function to initialize the crash console 43e12cb61fSJeenu Viswambharan * without a C Runtime to print crash report. 44e12cb61fSJeenu Viswambharan * Clobber list : r0 - r3 45e12cb61fSJeenu Viswambharan * --------------------------------------------- 46e12cb61fSJeenu Viswambharan */ 47e12cb61fSJeenu Viswambharanfunc plat_crash_console_init 48e12cb61fSJeenu Viswambharan ldr r0, =PLAT_ARM_CRASH_UART_BASE 49e12cb61fSJeenu Viswambharan ldr r1, =PLAT_ARM_CRASH_UART_CLK_IN_HZ 50e12cb61fSJeenu Viswambharan ldr r2, =ARM_CONSOLE_BAUDRATE 517e2bbef9SDaniel Boulby b console_pl011_core_init 52e12cb61fSJeenu Viswambharanendfunc plat_crash_console_init 53e12cb61fSJeenu Viswambharan 54e12cb61fSJeenu Viswambharan /* --------------------------------------------- 55e12cb61fSJeenu Viswambharan * int plat_crash_console_putc(int c) 56e12cb61fSJeenu Viswambharan * Function to print a character on the crash 57e12cb61fSJeenu Viswambharan * console without a C Runtime. 58e12cb61fSJeenu Viswambharan * Clobber list : r1 - r2 59e12cb61fSJeenu Viswambharan * --------------------------------------------- 60e12cb61fSJeenu Viswambharan */ 61e12cb61fSJeenu Viswambharanfunc plat_crash_console_putc 62e12cb61fSJeenu Viswambharan ldr r1, =PLAT_ARM_CRASH_UART_BASE 637e2bbef9SDaniel Boulby b console_pl011_core_putc 64e12cb61fSJeenu Viswambharanendfunc plat_crash_console_putc 65801cf93cSAntonio Nino Diaz 66801cf93cSAntonio Nino Diaz /* --------------------------------------------- 67*831b0e98SJimmy Brisson * void plat_crash_console_flush() 68801cf93cSAntonio Nino Diaz * Function to force a write of all buffered 69801cf93cSAntonio Nino Diaz * data that hasn't been output. 70*831b0e98SJimmy Brisson * Out : void. 71f2c83c1aSJeenu Viswambharan * Clobber list : r0 72801cf93cSAntonio Nino Diaz * --------------------------------------------- 73801cf93cSAntonio Nino Diaz */ 74801cf93cSAntonio Nino Diazfunc plat_crash_console_flush 75f2c83c1aSJeenu Viswambharan ldr r0, =PLAT_ARM_CRASH_UART_BASE 767e2bbef9SDaniel Boulby b console_pl011_core_flush 77801cf93cSAntonio Nino Diazendfunc plat_crash_console_flush 78